
This project implements an integrated system that executes remote commands sent over a serial UART interface. The core consists of ten functional blocks distributed across two distinct clock domains: a high-speed reference clock domain (REF_CLK) and a standard communication clock domain (UART_CLK). Incoming data frames received by the UART Receiver are synchronized and pushed to a system controller. This controller parses commands to perform either Register File reads/writes or arithmetic/logic operations using a built-in ALU. To handle the clock-domain crossing smoothly between processing and serialization, data results are buffered through an Asynchronous FIFO before being sent back to the master terminal via the UART Transmitter.
To test this project:
Clone the repository. Run the provided testbench:
List external hardware used in your project (e.g. PMOD, LED display, etc), if any
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | UART_RX | UART_TX | |
| 1 | Parity_Error | ||
| 2 | Framing_Error | ||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |