TTSKY26a Demoscene Competition

Demoscene competition!

The home computer demoscene has resulted in some amazing feats of hacking and pushing hardware to its limits.

The Tiny Tapeout demoscene competition sticks to the same audio/visual output format, but instead of using an existing computer, you create your own ASIC hardware!

The most fun demoscene competition I ever participated! Also it is time for ASICs to become part of the “official” demoscene movement!

The Tiny Tapeout community is welcoming and incredibly talented, it was like being back in the 90’s learning demoscene tricks at 3am on a table corner! It’s not easy, but it’s fun and rewarding, and you will learn many new tricks.

Taking part in the Tiny Tapeout demo competition was a great experience: figuring out how to make a demo in hardware, interacting with the community, discussing solutions afterwards…

For inspiration, check the winners of our last demoscene competition.

Free area on the chip!

Thanks to Precision Innovations, every entrant will receive a free tile on the TTSKY26a chip.

Precision Innovations has developed and delivered industrial quality open-source EDA tools since 2019.

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Categories

  • 1 tile
  • 2 tiles
  • 2 tile + QSPI Pmod 4kByte max FLASH, unlimited RAM
  • 4 tiles
  • Newcomer

Judges

We have some fantastic judges lined up:

  • Jeri Ellsworth - A self-taught chip designer and inventor, Jeri is legendary in the hardware community for squeezing entire systems onto single chips - including a complete Commodore 64 inside a joystick. She also pioneered DIY semiconductor fabrication, the first person to demonstrate building a transistor using household items.
  • Will Green - Will runs Project F, an FPGA and hardware education site that covers graphics, maths, and RISC-V. Will’s current focus is Isle, an open FPGA computer that encourages tinkering, experimentation, and doing your own thing. His tutorials have helped countless people bridge the gap from software to FPGAs - making him a perfect judge for designs that push display hardware to its limits.
  • Sprite_tm - Sprite is back! A legendary hacker with a gift for making hardware do things it was never meant to. Sprite_tm has ported Doom to a Rigol scope, built a Vectrex multi cart, and built the Hackaday FPGA badge - all with the kind of deranged ingenuity that makes him a natural judge for our ASIC demoscene competition.

What are the rules?

  • Free single tile (but no chip) to all entrants
  • To qualify for the Newcomer category, TTSKY26a must be your first Tiny Tapeout
  • Must target the VGA Pmod
  • RP2350 on the devkit is only used for selecting the design, clock and reset
  • If the demo is interactive must use the gamepad Pmod
  • If the demo is using FLASH or RAM, must use QSPI Pmod
  • If the demo produces audio, must use the TT audio Pmod
  • Apart from the above - no other hardware must be used
  • Start up sequence using the commander app:
    • Enable the project, (optionally provide binary image for FLASH, optionally provide a value for ui_in[7:0] ), Reset, Enjoy
  • Final judging will be done against the silicon after chips have been received (expected November 2026)
  • Must be submitted to TTSKY26a before the closing date of May 11th 2026
  • Must comply with our terms

How to enter

  • Once your design is passing the GitHub actions, submit it to the shuttle at app.tinytapeout.com
  • Send us a link to your submitted design with the competition form
  • We will send you a coupon for a free tile on TTSKY26a within 48 hours
  • Apply the coupon and submit a revision to the shuttle
  • You can continue working on your design up to the closing date

How to get help

Prizes

prizes

  • All entrants who purchase the demoboard will get free VGA, Audio and QSPI Pmod
  • Winners of each category will receive combinations of:
    • Lithography masks
    • Silicon wafers
    • Matt’s first ASIC die mounted in an epoxy cube, numbered and signed
    • ASIC baseball caps
    • Free tiles for future tapeouts
    • Previous TT chip

Small print

  • How will the competition be judged?
    • A panel of appointed judges will vote and have the final say
  • The final results will be judged on the post-silicon results
  • The competition will be judged when all the judges have received silicon. This is expected to be late November.
  • TT team members are excluded from winning prizes, but can still enter
  • There is no possibility to extend the deadline
  • You can change the documentation used by the judges up to the point of judging the design. Any changes must be submitted to the chip datasheet by pull request to the GitHub repository
  • You are not limited to a maximum clock frequency, but if the judges can’t get the design to work (because their ASIC is slower for example) then you run the risk of not qualifying. You are advised to use ~80MHz or less
  • You are advised to stick with a standard VGA timing, if it doesn’t work on the judge’s display you run the risk of not qualifying