Tiny Tapeout

  • Home
  • Tiny Tapeouts
    • Tiny Tapeout 01
    • Tiny Tapeout 02
    • Tiny Tapeout 03
  • Digital Design Guide
    • Getting started with our digital design tool
    • Holidays
    • Logic Gates
    • Logic Puzzle - Flip Flop
    • Logic Puzzle - Edge Detect
    • Logic Puzzle - Full Adder
    • Logic Puzzle - Padlock
    • Customisable Design - Padlock
    • Customisable Design - UART
    • Customisable Design - 7-Seg
    • Generating Wokwi designs from truth tables
  • How do semiconductors work?
    • Introduction to SiliWiz
    • Draw a Resistor
    • Parasitics
    • Voltage Divider
    • Draw a capacitor
    • Draw an N MOSFET
    • Making a logic inverter
    • Draw a P type MOSFET
    • Draw a CMOS inverter
  • Making ASICs
  • Working with HDLs
    • Important!
    • FPGA to ASIC
    • HDL resources
    • HDL templates
    • Testing your design
  • Teaching resources
  • FAQ
  • Contact
  • Press
  • Terms
  • Credits

Tiny Tapeout > Working with HDLs > HDL resources
  • Verilog
  • Tools
  • Community

HDL resources

Verilog

  • Verilog explorer in the browser
  • WTFpga workshop
  • Obijuan’s Verilog tutorial
  • Verilog cheatsheet

Tools

  • All the open source tools in one bundle
  • Cocotb website

Community

  • For help and support, join the verilog and HDL channel of our discord server.