
Uses d flip-flops to enter a dedupe state, filters bit stream (inverts duplication) and signals the events.
Receive OUT0 (RX) and average the number of bits received. The average for 0 and 1 should approach, approximately, 50% over time.
A clock source and a random number generator transmitting a bit stream over a pinout (GPIO).
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | CLK | TX | |
| 1 | RX | 0_DEDUP_RST | |
| 2 | 1_DEDUP_RST | ||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |