
NeuroPulse is a 4-neuron spiking neural network accelerator using the Leaky Integrate-and-Fire (LIF) model. Weights are held off-chip by an RP2040, streamed in every pass via PIO — keeping the transistor budget under 2000T.
Architecture:
vmem) and 3-bit activity tracevmem = vmem - (vmem >> 2) — 75% retention per cycle, no multiplier neededFSM sequence (per neuron):
| State | Action |
|---|---|
| LATCH | Capture ui_in[7:4] as external spike injection (neuron 0 only) |
| TRACE | Decay or reset this neuron's activity trace |
| ACCUM_0–3 | Read weight[N][i] from RP2040 on ui_in[3:0], accumulate spike[i] * weight |
| THRESH | Apply threshold, emit spike, reset vmem if fired |
Hebbian learning (LTP only): when a neuron fires with learn_ena=1, ltp_pulse goes high on uo_out[7].
The RP2040 watches this signal and increments the corresponding weight in its own table.
Connect an RP2040 running the PIO weight-streaming firmware (see docs/rp2040.md).
Minimal smoke test without RP2040:
rst_n low, then release. All vmem and spikes clear to zero.ui_in[7:4] to inject external spikes (e.g. 0001 = fire neuron 0).uo_out[3:0] shows spike outputs; watch uo_out[4:5] to see the FSM stepping through neurons 0–3.uio_out[6:5] shows the active synapse during ACCUM states; uo_out[6] (in_accum) gates when the RP2040 must present weights.With RP2040:
WEIGHTS[4][4] table on the RP2040.weight[N][syn] on ui_in[3:0], timed to the chip's deterministic FSM.uo_out[7] (ltp_pulse) + uo_out[5:4] (neuron_sel) for Hebbian weight updates.docs/rp2040.md for the full interface protocol and PIO program.| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | Weight bit 0 (from RP2040, valid during ACCUM) | Spike output neuron 0 | learn_ena (input: 1 = Hebbian learning on) |
| 1 | Weight bit 1 (from RP2040, valid during ACCUM) | Spike output neuron 1 | in_accum (high when RP2040 must present weight) |
| 2 | Weight bit 2 (from RP2040, valid during ACCUM) | Spike output neuron 2 | Neuron select bit 0 — neuron_idx[0] |
| 3 | Weight bit 3 (from RP2040, valid during ACCUM) | Spike output neuron 3 | Neuron select bit 1 — neuron_idx[1] |
| 4 | Ext spike neurons 4 (latched at S_LATCH, neuron 0 turn) | Spike output neuron 4 | Neuron select bit 2 — neuron_idx[2] |
| 5 | Ext spike neuron 5 | Spike output neuron 5 | Synapse select bit 0 — syn_idx[0] (valid when in_accum=1) |
| 6 | Ext spike neuron 6 | Spike output neuron 6 | Synapse select bit 1 — syn_idx[1] (valid when in_accum=1) |
| 7 | Ext spike neuron 7 | Spike output neuron 7 | Synapse select bit 2 — syn_idx[2] (valid when in_accum=1) |