
This project implements a 9-channel oscillator frequency measurement ASIC with programmable gate time, SPI-controlled DAC outputs, and SPI-based ADC sampling. The device is controlled over I²C.
Each oscillator input is counted over a programmable time window derived from the 50 MHz system clock. After the gate interval completes, the counts are latched into a snapshot register bank accessible via I²C.
Two DAC channels are programmed via I²C and transmitted over SPI. An external 12-bit SPI ADC is periodically sampled and included in the measurement snapshot stream.
Apply 1.8 V supply and provide a 50 MHz clock.
Release reset.
Confirm I²C device responds at address 0x2A.
Enable counting by writing:
REG 0x04 = 0x11
Program gate time:
Write 32-bit gate_cycles to 0x20–0x23
Write 0x27 = 0x01 to apply
After the gate interval completes, read 38 bytes starting at 0x48.
Expected count behavior:
If oscillator frequency is 11 MHz and gate time is 1 ms:
Count ≈ 11,000
To test DAC:
To test ADC:
Required:
Optional:
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | I2C_SCL | SPI_DAC_SCLK | I2C_SDA (open-drain) |
| 1 | SPI_DAC_MISO | SPI_DAC_MOSI | OSC5_IN |
| 2 | SPI_ADC_MISO | SPI_DAC_CS_N | OSC6_IN |
| 3 | OSC0_IN | SPI_ADC_SCLK | OSC7_IN |
| 4 | OSC1_IN | SPI_ADC_CS_N | OSC8_IN |
| 5 | OSC2_IN | ||
| 6 | OSC3_IN | ||
| 7 | OSC4_IN |