
AND gates are connected to input 2,3,4,8. An S would be visible on the display if inputted correctly.
Set the inputs and check the outputs match with the expected results:
| input 2 3 4 8 | output AND |
|---|---|
| 0 0 0 0 | 0 |
| 1 0 0 0 | 0 |
| 0 1 0 0 | 0 |
| 0 0 1 0 | 0 |
| 0 0 0 1 | 0 |
| 1 1 0 0 | 0 |
| 0 1 1 0 | 0 |
| 0 0 1 1 | 0 |
| 1 0 0 1 | 0 |
| 0 1 0 1 | 0 |
| 1 0 1 1 | 0 |
| 1 1 1 1 | 1 |
External hardware used are 7 segment display, and clock and reset.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | |||
| 1 | INPUT 2 | OUTPUT AND | |
| 2 | INPUT 3 | OUTPUT AND | |
| 3 | INPUT 4 | OUTPUT AND | |
| 4 | OUTPUT AND | ||
| 5 | OUTPUT AND | ||
| 6 | |||
| 7 | INPUT 8 |