
Binary up counter is interfaced using AND, OR and NOT logic gates to allow for the pattern sabba to be displayed on the 7-segment display by
Run the system at clock frequency of 1Hz and observe the output as it should should SAbbA
List external hardware used in your project (e.g. PMOD, LED display, etc), if any
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | sevsegA | ||
| 1 | sevsegB | ||
| 2 | sevsegC | ||
| 3 | sevsegD | ||
| 4 | sevsegE | ||
| 5 | sevsegF | ||
| 6 | sevsegG | ||
| 7 |