911 TinyTapeOut workshop
911 : TinyTapeOut workshop
- Author: Swapnanil Chattopadhyay
- Description: Test logic gates
- GitHub repository
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How it works
Eight input switches (IN0–IN7) feed the input bus.
Two selected inputs (IN1 and IN2) are routed into an AND gate whose output is sent to the output block.
Two divided clock signals are taken from the counter stages and routed to output pins and to the 7-segment display driver.
A reset push button clears the chain to zero.
The outputs are connected to:
Logic output (AND result)
Divided clock outputs
7-segment display segments
How to test
Test the AND logic
Set the two selected input switches high or low.
Verify the AND truth table:
| A | B | AND |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The AND output should only be high when both inputs are high.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | IN0 | OUT0 | |
| 1 | IN1 | OUT1 | |
| 2 | IN2 | OUT2 | |
| 3 | IN3 | OUT3 | |
| 4 | IN4 | OUT4 | |
| 5 | IN5 | OUT5 | |
| 6 | IN6 | OUT6 | |
| 7 | IN7 | OUT7 |