459 Mini 8-bit Accumulator CPU
459 : Mini 8-bit Accumulator CPU
- Author: Rodgers Odiwuor
- Description: A tiny Von Neumann 8-bit accumulator CPU with a 16-instruction ISA (load/store, add/sub, bitwise logic, jump/jump-if-zero/jump-if-carry, output, halt).
- GitHub repository
- Open in 3D viewer
- Open in Tiny Tapeout Explorer
- Clock: 10000000 Hz
How it works
This is a tiny 8-bit accumulator-based CPU with a Von Neumann architecture: 16 words of 8-bit memory shared between code and data. Each instruction is 8 bits: a 4-bit opcode and a 4-bit operand (a memory address or an immediate value). The CPU runs a simple two-state fetch/execute loop.
The built-in demo program computes (3 + 4), XORs the result with 9, inverts the final value, and outputs each intermediate result via the OUT instruction, then halts.
Supported instructions: NOP, LDA, ADD, SUB, STA, LDI, JMP, JZ, JC, OUT, ADI, AND, OR, XOR, INV, HLT.
How to test
Reset the chip (pulse rst_n low then high). Watch uo_out: it should show 7, then 14, then 0xF1 (241), in that order. The halted flag on uio_out[7] should go high once the program finishes. uio_out[3:0] exposes the live program counter and uio_out[4] the FSM state for debugging.
External hardware
None required.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | acc bit 0 (OUT register) | debug: pc bit 0 | |
| 1 | acc bit 1 (OUT register) | debug: pc bit 1 | |
| 2 | acc bit 2 (OUT register) | debug: pc bit 2 | |
| 3 | acc bit 3 (OUT register) | debug: pc bit 3 | |
| 4 | acc bit 4 (OUT register) | debug: FSM state | |
| 5 | acc bit 5 (OUT register) | debug: zero flag | |
| 6 | acc bit 6 (OUT register) | debug: carry flag | |
| 7 | acc bit 7 (OUT register) | debug: halted flag |