41 Matmul System
41 : Matmul System
- Author: Abarajithan
- Description: Matmul System
- GitHub repository
- Clock: 0 Hz
How it works
This is a simple system that performs matrix-vector multiplication. The matrix K[R,C] and vector X[R] is sent from outside through UART. They are decoded by a UART RX module, and sent into the matrix-vector multiplication core as AXI-Stream. The core performs the multiplication and outputs the result as AXI-Stream. The result is then packed into UART format by the UART TX module and sent outside.
How to test
iverilog -g2012 -o compiled src/mvm_uart_system.v src/uart_rx.v src/uart_tx.v src/axis_matvec_mul.v src/matvec_mul.v src/skid_buffer.v test/mvm_uart_system_tb.sv test/simple_axis_tb.sv src/project.v && ./compiled
External hardware
None
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | RX | TX | |
| 1 | |||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |