330 4-bit-array-multiplier :: Quicker, easier and cheaper to make your own chip!

How it works

This project is a 4x4 array multiplier which multiplies two 4-bit numbers to produce an 8-bit result. The miltiplier work by generating partial products through bit-wise AND operations between the individual bits of the two input numbers. These partial products are then summed using a series of full adders. Which handle both the sum and the carry bits. The structure of the code starts from the least significant bits (LSB) and progresses to the most significant bits (MSB), adding the partial products in stages. Each stage involves full adders that sum three inputs: two partial products and a carry from the previous stage. The final product is generated by combining the sums and carries, with the last carry assigned to the most significant bit of the result. This approach efficiently organizes binary multiplication using logical AND gates and full adders. An illustration of the structure of this multiplier can be seen in the figure below. LAB_4_multi_diagram

How to test

To test the functionality of this multiplier, a test bench file would be used to instantiate the multiplier module, provide different 4-bit values for the inputs m and q, and observe the 8-bit output p. For each test case, the testbench compares the result of the multiplier's output with the expected result of multiplying m and q using simple binary arithmetic. By applying a variety of test inputs, including edge cases such as all zeros, all ones, and alternating bit patterns, we can verify that the multiplier handles all cases correctly. The testbench would also use initial and always blocks to display the results of each multiplication using $display statements, allowing us to validate the behavior in a simulation environment like Vivado.

External hardware

N/A

#	Input	Output
0	q[0]	p[0]
1	q[1]	p[1]
2	q[2]	p[2]
3	q[3]	p[3]
4	m[0]	p[4]
5	m[1]	p[5]
6	m[2]	p[6]
7	m[3]	p[7]

330 4-bit-array-multiplier