324 Array Multiplier
324 : Array Multiplier
- Author: Leon Ha, Jegyeoung An
- Description: 4*4 Structural Array structural multiplier
- GitHub repository
- Clock: 0 Hz
How it works
The project is a 4x4 array multiplier. The inputs m and q are 4-bit factors that get multiplied to produce the output p which is a 8-bit product of m and q. This was created using manual structural design. The module array_mult_structural multiplies two 4 bit inputs (m and q) to produce an 8-bit product. Design components such as AND gates and full adders were applied to construct the design. The full adder module takes three 1-bit inputs, a, b, and cin, and produces a 1-bit sum and a 1-bit cout. The assign statement was used to assign the results. Four 4-bit partial products were generated. The LSB (Least Significant Bit) was assigned as the LSB of the first partial product. The sum of the 4-bit partial products are assigned to the output, and the carryout is stored.
How to test
In order to use this project, two 4-bit factors can be assigned to m and q. The output p should be the product of m and q.
- 10 * 5 = 50
- 4 * 2 = 8
- 0 * 0 = 0
- 2 * 1 = 2
- 7 * 7 = 49
External hardware
N/A
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | q[0] | p[0] | |
| 1 | q[1] | p[1] | |
| 2 | q[2] | p[2] | |
| 3 | q[3] | p[3] | |
| 4 | m[0] | p[4] | |
| 5 | m[1] | p[5] | |
| 6 | m[2] | p[6] | |
| 7 | m[3] | p[7] |