In this lab, the functionality of a 4x4 multiplier array utilizing full adders to perform binary multiplication. The process began with two 4-bit binary numbers, A and B, from which we generated four partial products by multiplying each bit of B with the entirety of A.These partial products binary are then aligned for addition.To sum the partial products, we use full adders, which combined the bits from each partial product while managing carries through each bit position. This systematic addition ultimately yielded an 8-bit result, representing the product of the two original 4-bit numbers. This experiment demonstrates the principles of binary multiplication and the role of full adders in digital circuit design.
To test a 4x4 multiplier, apply different combinations of 4 bit input signals while varying the select lines to ensure the correct input is routed to the output.The output for each combination should be recorded and compared against the expected output based on the select line values.Any discrepancies will indicate a fault in the multiplier design or implementation, allowing for troubleshooting.
N/A
# | Input | Output | Bidirectional |
---|---|---|---|
0 | m[0] | p[0] | |
1 | m[1] | p[1] | |
2 | m[2] | p[2] | |
3 | m[3] | p[3] | |
4 | q[0] | p[4] | |
5 | q[1] | p[5] | |
6 | q[2] | p[6] | |
7 | q[3] | p[7] |