132 Hybrid_Adder_8bit
132 : Hybrid_Adder_8bit
- Author: James Xie, Cameron Bedard
- Description: 8-bit hybrid adder (using CLA and KSA)
- GitHub repository
- Clock: 0 Hz
How it works
The 8-bit Hybrid Adder combines the gate efficency of a 4-bit Kogge Stone and the low latency of a 4-bit Carry Look Ahead Adder. The resultant 8-bit Hybrid Adder is faster than the an 8-bit Kogge Stone Adder and more gate efficent than a 8-bit Carry Look Ahead Adder.
How to test
The first number you want to add, use the eight inputs for ui_in for the input number A and the eight inputs for uio_in for the input number B. The output of the two numbers added together will be outputs on the eight outputs on uo_out.
External hardware
The only external hardware needed is applying the 3.3v on the inputs and reading the output.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | a[0] | sum[0] | b[0] |
| 1 | a[1] | sum[1] | b[1] |
| 2 | a[2] | sum[2] | b[2] |
| 3 | a[3] | sum[3] | b[3] |
| 4 | a[4] | sum[4] | b[4] |
| 5 | a[5] | sum[5] | b[5] |
| 6 | a[6] | sum[6] | b[6] |
| 7 | a[7] | sum[7] | b[7] |