812 Verilog ring oscillator V3
812 : Verilog ring oscillator V3
- Author: algofoogle (Anton Maurovic)
- Description: sky130 inv_2 ring oscillator with externally-selectable length
- GitHub repository
- Clock: 0 Hz
What is this?
See tt09-ring-osc and tt09-ring-osc2 for my other ring oscillator experiments on TT09.
This one has a configurable ring oscillator; the feedback can be tapped at different parts of the chain.
This use verilog to instantiate the rings of (an odd number of) sky130_fd_sc_hd__inv_2 cells.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | tap[0] | out[0] | |
| 1 | tap[1] | out[1] | |
| 2 | tap[2] | out[2] | |
| 3 | out[3] | ||
| 4 | out[4] | ||
| 5 | out[5] | ||
| 6 | out[6] | ||
| 7 | out[7] |