620 Synchronous hex counter decoder
620 : Synchronous hex counter decoder
- Author: Spehro
- Description: A synchronous 4 bit counter with full hex decoding
- GitHub repository
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- Clock: 0 Hz
How it works
"This project is a 4-bit synchronous counter with a fully-decoded hex output. An enable input is provided
Decoding is done entirely with 29 2-input NAND gates, following the insanely minimized design from Kim Oyhus in the code golf stack exchange. One gate was trivially elminated because the complementary input was available. Possibly further optimization would be possible since it was not optimized for this particular situation. There are many gate delays between the input chanage and the last output change, however that is deemed insignificant for a display application. "
How to test
"Reset will reset the counter to 0 asynchronously, so the display will show '0' IN0 is enable (active high). To get the counter to count make IN0 high The counter counts on the positive edge of the clock input. Fully decoded 7-segment (active high) is provided on outputs 0..6. Output 7 is not used.
"
External hardware
"No external hardware is required beyond the standard demo board"
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | IN0 | OUT0 | |
| 1 | IN1 | OUT1 | |
| 2 | IN2 | OUT2 | |
| 3 | IN3 | OUT3 | |
| 4 | IN4 | OUT4 | |
| 5 | IN5 | OUT5 | |
| 6 | IN6 | OUT6 | |
| 7 | IN7 | OUT7 |