14 Classic 8-bit era Programmable Sound Generator SN76489

14 : Classic 8-bit era Programmable Sound Generator SN76489

Design render
  • Author: ReJ aka Renaldas Zioma
  • Description: The SN76489 Digital Complex Sound Generator (DCSG) is a programmable sound generator chip from Texas Instruments.
  • GitHub repository
  • Open in 3D viewer
  • Clock: 4000000 Hz

How it works

This Verilog implementation is a replica of the classical SN76489 programmable sound generator. With roughly a 1400 logic gates this design fits on a single tile of the TinyTapeout.

The goals of this project

  1. closely replicate the behavior and eventually the complete design of the original SN76489
  2. provide a readable and well documented code for educational and hardware preservation purposes
  3. leverage the modern fabrication process

A significant effort was put into a thorough test suite for regression testing and validation against the original chip behavior.

The future work

The next step is to incorporate analog elements into the design to match the original SN76489 - DAC for each channel and an analog OpAmp for channel summation.

Chip technical capabilities

  • 3 square wave tone generators
  • 1 noise generator
  • 2 types of noise: white and periodic
  • Capable to produce a range of waves typically from 122 Hz to 125 kHz, defined by 10-bit registers.
  • 16 different volume levels

Registers The behavior of the SN76489 is defined by 8 "registers" - 4 x 4 bit volume registers, 3 x 10 bit tone registers and 1 x 3 bit noise configuration register.

Channel Volume registers Tone & noise registers
0 Channel #0 attenuation Tone #0 frequency
1 Channel #1 attenuation Tone #1 frequency
2 Channel #2 attenuation Tone #2 frequency
3 Channel #3 attenuation Noise type and frequency

Square wave tone generators Square waves are produced by counting down the 10-bit counters. Each time the counter reaches the 0 it is reloaded with the corresponding value from the configuration register and the output bit of the channel is flipped producing square waves.

Noise generator Noise is produced with 15-bit Linear-feedback Shift Register (LFSR) that flips the output bit pseudo randomly. The shift rate of the LFSR register is controller either by one of the 3 hardcoded power-of-two dividers or output from the channel #2 tone generator is used.

Attenuation Each of the four SN76489 channels have dedicated attenuation modules. The SN76489 has 16 steps of attenuation, each step is 2 dB and maximum possible attenuation is 28 dB. Note that the attenuation definition is the opposite of volume / loudness. Attenuation of 0 means maximum volume.

Finally, all the 4 attenuated signals are summed up and are sent to the output pin of the chip.

Historical use of the SN76489

The SN76489 family of programmable sound generators was introduced by Texas Instruments in 1980. Variants of the SN76489 were used in a number of home computers, game consoles and arcade boards:

The SN76489 chip family competed with the similar General Instrument AY-3-8910.

The original pinout of the SN76489AN

               ,--._.--.
        D5  -->|1    16|<-- VCC
        D6  -->|2    15|<-- D4
        D7  -->|3    14|<-- CLOCK
     ready* <--|4    13|<-- D3
       /WE  -->|5    12|<-- D2
       /ce* -->|6    11|<-- D1
  AUDIO OUT <--|7    10|<-- D0
        GND ---|8     9|    not connected*
               `-------'
        * -- omitted from this Verilog implementation

Difference from the original hardware

This Verilog implementation is a completely digital and synchronous design that differs from the original SN76489 design which incorporated analog parts.

Audio signal output While the original chip had integrated OpAmp to sum generated channels in analog fashion, this implementation does digital signal summation and digital output. The module provides two alternative outputs for the generated audio signal:

  1. digital 8-bit audio output suitable for external Digital to Analog Converter (DAC)
  2. pseudo analog output through Pulse Width Modulation (PWM)

Separate 4 channel output Outputs of all 4 channels are exposed along with the master output. This allows to validate and mix signals externally. In contrast the original chip was limited to a single audio output pin due to the PDIP-16 package.

No DC offset This implementation produces output 0/1 waveforms without DC offset.

No /CE and READY pins Chip enable control pin /CE is omitted in this design for simplicity. The behavior is the same as if /CE is tied low and the chip is considered always enabled.

Unlike the original SN76489 which took 32 cycles to update registers, this implementation handles register writes in a single cycle and chip behaves as always READY.

Synchronous reset and single phase clock The original design employed 2 phases of the clock for the operation of the registers. The original chip had no reset pin and would wake up to a random state.

To make it easier to synthesize and test on FPGAs this implementation uses single clock phase and synchronous reset for registers.

A configurable clock divider was introduced in this implementation.

  1. the original SN76489 with the master clock internally divided by 16. This classical chip was intended for PAL and NTSC frequencies. However in BBC Micro 4 MHz clock was employed.
  2. SN94624/SN76494 variants without internal clock divider. These chips were intended for use with 250 to 500 KHz clocks.
  3. high frequency clock configuration for TinyTapeout, suitable for a range between 25 MHz and 50 Mhz. In this configuration the master clock is internally divided by 128.

The reverse engineered SN76489

This implementation is based on the results from these reverse engineering efforts:

  1. Annotations and analysis of a decapped SN76489A chip.
  2. Reverse engineered schematics based on a decapped VDP chip from Sega Mega Drive which included a SN76496 variant.

How to test

Summary of commands to communicate with the chip

The SN76489 is programmed by updating its internal registers via the data bus. Below is a short summary of the communication protocol of SN76489. Please consult SN76489 Technical Manual for more information.

Command Description Parameters
1cc0ffff Set tone fine frequency f - 4 low bits, c - channel #
00ffffff Follow up with coarse frequency f - 6 high bits
11100bff Set noise type and frequency b - white/periodic, f - frequency control
1cc1aaaa Set channel attenuation a - 4 bit attenuation, c - channel #
NF1 NF0 Noise frequency control
0 0 Clock divided by 512
0 1 Clock divided by 1024
1 0 Clock divided by 2048
1 1 Use channel #2 tone frequency

Write to SN76489 Hold /WE low once data bus pins are set to the desired values. Pull /WE high before setting different value on the data bus.

Note frequency

Use the following formula to calculate the 10-bit period value for a particular note :

$ tone period_{cycles} = clock_{frequency} / (32_{cycles} * note_{frequency}) $

For example 10-bit value that plays 440 Hz note on a chip clocked at 4 MHz would be:

$ tone period_{cycles} = 4000000 Hz / (32_{cycles} * 440 Hz) = 284 = 11C_{hex} $

An example to play a note accompanied with a lower volume noise

/WE D7 D6/5 D4..D0 Explanation
0 1 00 01100 Set channel #0 tone low 4-bits to $C_{hex} = 1100_{bin}$
0 0 00 10001 Set channel #0 tone high 6-bits to $11_{hex} = 010001_{bin}$
0 1 00 10000 Set channel #0 volume to 100%, attenuation 4-bits are $0_{dec} = 0000_{bin}$
0 1 11 00100 Set channel #3 noise type to white and divider to 512
0 1 11 11000 Set channel #3 noise volume to 50%, attenuation 4-bits are $8_{dec} = 1000_{bin}$
Timing diagram


CLK   ____      ____      ____      ____      ____      ____         
   __/    `____/    `____/    `____/    `____/    `____/    `___ ...
     |        |         |         |         |         |
     |        |         |         |         |         |

/WE _       __        __        __        __        _______
     `_____/  `______/  `______/  `______/  `______/   *
                                                       ^
D7..D0_______  ________  ________  ________  ________  |
   _/10001100  00010001  10010000  11100100  11111000`_|______
      chan#0    chan#0    chan#0    chan#3    chan#3   |
    tone=h??C   =h11C    atten=0    div=16    atten=8  |
      h011C = 440 Hz              /16 = ~1 Khz         |
                                 white noise           |
                                                       |
                                                 noise restarts
                                            after /WE goes high and
                                     there was a write to noise register

Configurable clock divider

Clock divider can be controlled through SEL0 and SEL1 control pins and allows to select between 3 chip variants.

SEL1 SEL0 Description Clock frequency
0 0 SN76489 mode, clock divided by 16 3.5 .. 4.2 MHz
1 1 -----//----- 3.5 .. 4.2 MHz
0 1 SN76494 mode, no clock divider 250 .. 500 kHZ
1 0 New mode for TT05, clock div. 128 25 .. 50 MHz
SEL1 SEL0 Formula to calculate the 10-bit tone period value for a note
0 0 $clock_{frequency} / (32_{cycles} * note_{frequency})$
1 1 -----//-----
0 1 $clock_{frequency} / (2_{cycles} * note_{frequency})$
1 0 $clock_{frequency} / (256_{cycles} * note_{frequency})$

Some examples of music recorded from the chip simulation

  • [https://www.youtube.com/watch?v=ghBGasckpSY](Crazee Rider BBC Micro game)
  • [https://www.youtube.com/watch?v=HXLAdA02I-w](MISSION76496 tune for Sega Master System)

External hardware

DAC (for ex. Digilent R2R PMOD), RC filter, amplifier, speaker.

The data bus of the SN76489 chip has to be connected to microcontroller and receive a regular stream of commands. The SN76489 produces audio output and has to be connected to a speaker. There are several ways how the overall schematics can be established.

8-bit parallel output via DAC One option is to connect off the shelf data parallel Digital to Analog Converter (DAC) for example Digilent R2R Pmod to the output pins and route the resulting analog audio to piezo speaker or amplifier.

uController              SN76489
,---------.            ,---._.---. 
|         |    4 Mhz ->|CLK  SEL0|<-- 0
|    GPIOx|----------->|D0   SEL1|<-- 0
|    GPIOx|----------->|D1       |         ,----------.
|    GPIOx|----------->|D2   OUT0|-------->|LSB       |
|    GPIOx|----------->|D3   OUT1|-------->|          |  
|    GPIOx|----------->|D4   OUT2|-------->|   pDAC   |  Headphones
|    GPIOx|----------->|D5   OUT3|-------->|    or    |      or    
|    GPIOx|----------->|D6   OUT4|-------->| RESISTOR |    Buzzer    
|    GPIOx|----------->|D7   OUT5|-------->|  ladder  |         /|
|    GPIOx|----------->|/WE  OUT6|-------->|          |     .--/ |
`---------'            |     OUT7|-------->|MSB       |-----|    |
                       `---------'         `----------'     `--` |
                                                             |  `|
                                                             |
                                                        GND ---  

AUDIO OUT through RC filter Another option is to use the Pulse Width Modulated (PWM) AUDIO OUT pin that combines 4 channels with the Resistor-Capacitor based low-pass filter or better the Operation Amplifier (Op-amp) & Capacitor based integrator:

uController              SN76489
,---------.            ,---._.---. 
|         |    4 Mhz ->|CLK  SEL0|<-- 0
|    GPIOx|----------->|D0   SEL1|<-- 0
|    GPIOx|----------->|D1       |
|    GPIOx|----------->|D2       |
|    GPIOx|----------->|D3       |          C1
|    GPIOx|----------->|D4       |     ,----||----.
|    GPIOx|----------->|D5       |     |          | 
|    GPIOx|----------->|D6       |     |  Op-amp  |        Speaker     
|    GPIOx|----------->|D7  AUDIO|     |   |X     |            /|
|    GPIOx|----------->|/WE  OUT |-----+---|-X    |   C2   .--/ |
`---------'            `---------'         |  }---+---||---|    |
                                        ,--|+/             `--` |
                                        |  |/               |  `|
                                        |                   |
                                   GND ---             GND ---  

Separate channels through the Op-amp The third option is to externally combine 4 channels with the Operational Amplifier and low-pass filter:

uController              SN76489
,---------.            ,---._.---. 
|         |    4 Mhz ->|CLK  SEL0|<-- 0
|    GPIOx|----------->|D0   SEL1|<-- 0
|    GPIOx|----------->|D1       |
|    GPIOx|----------->|D2       |
|    GPIOx|----------->|D3       |           C1
|    GPIOx|----------->|D4       |      ,----||----.
|    GPIOx|----------->|D5  chan0|---.  |          | 
|    GPIOx|----------->|D6  chan1|---+  |  Op-amp  |        Speaker
|    GPIOx|----------->|D7  chan2|---+  |   |X     |            /|
|    GPIOx|----------->|/WE chan3|---+--+---|-X    |   C2   .--/ |
`---------'            `---------'          |  }---+---||---|    |
                                         ,--|+/             `--` |
                                         |  |/               |  `|
                                         |                   |
                                    GND ---             GND ---  

IO

#InputOutputBidirectional
0D0 data busdigital audio LSB(in) **/WE** write enable
1D1 data busdigital audio(in) **SEL0** clock divider
2D2 data busdigital audio(in) **SEL1** clock divider
3D3 data busdigital audio(out) channel 0 (PWM)
4D4 data busdigital audio(out) channel 1 (PWM)
5D5 data busdigital audio(out) channel 2 (PWM)
6D6 data busdigital audio(out) channel 3 (PWM)
7D7 data busdigital audio MSB(out) AUDIO OUT master (PWM)

Chip location

Controller Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux tt_um_chip_rom (Chip ROM) tt_um_factory_test (Tiny Tapeout Factory Test) tt_um_tommythorn_maxbw (Asynchronous Multiplier) tt_um_mattvenn_rgb_mixer (RGB Mixer demo5) tt_um_find_the_damn_issue (Find The Damn Issue) tt_um_brandonramos_VGA_Pong_with_NES_Controllers (VGA Pong with NES Controllers) tt_um_kb2ghz_xalu (4-bit minicomputer ALU) tt_um_a1k0n_demo (Demo by a1k0n) tt_um_zec_square1 ("SQUARE-1": VGA/audio demo) tt_um_jmack2201 (Sprite Bouncer with Looping Background Options) tt_um_ran_DanielZhu (Dice) tt_um_gfg_development_tinymandelbrot (TinyMandelbrot) tt_um_toivoh_demo_tt08 (Sequential Shadows [TT08 demo competition]) tt_um_quarren42_demoscene_top (asic design is my passion) tt_um_crispy_vga (Crispy VGA) tt_um_MichaelBell_canon (TT08 Pachelbel's Canon demo) tt_um_shuangyu_top (Calculator) tt_um_wokwi_407306064811090945 (DDR throughput and flop aperature test) tt_um_favoritohjs_scroller (VGA Scroller) tt_um_tt08_wirecube (Wirecube) tt_um_vga_glyph_mode (Glyph Mode) tt_um_a1k0n_vgadonut (VGA donut) tt_um_roy1707018 (RO) tt_um_sign_addsub (CMOS design of 4-bit Signed Adder Subtractor) tt_um_patater_demokit (Patater Demo Kit Waggling Rainbow on a Chip) tt_um_simon_cipher (simon_cipher) tt_um_thexeno_rgbw_controller (RGBW Color Processor) tt_um_demosiine_sda (DemoSiine) tt_um_bytex64_munch (Munch) tt_um_cfib_demo (cfib Demoscene Entry) tt_um_Richard28277 (4-bit ALU) tt_um_betz_morse_keyer (Morse Code Keyer) tt_um_nvious_graphics (nVious Graphics) tt_um_ezchips_calc (8-Bit Calculator) tt_um_hack_cpu (HACK CPU) tt_um_ring_divider (Divided Ring Oscillator) tt_um_ephrenm_tsal (TSAL_TT) tt_um_kapilan_alarm (Alarm Clock) tt_um_stochastic_addmultiply_CL123abc (Stochastic Multiplier, Adder and Self-Multiplier) tt_um_dlfloatmac (DL float MAC) tt_um_faramire_rotary_ring_wrapper (Rotary Encoder WS2812B Control) tt_um_i2c_peripheral_stevej (i2c peripherals: leading zero count and fnv-1a hash) tt_um_yuri_panchul_schoolriscv_cpu_with_fibonacci_program (schoolRISCV CPU with Fibonacci program) tt_um_yuri_panchul_adder_with_flow_control (Adder with Flow Control) tt_um_brailliance (Brailliance) tt_um_nyan (nyan) tt_um_MichaelBell_mandelbrot (VGA Mandelbrot) tt_um_fountaincoder_top_ad (pulse_add) tt_um_edwintorok (Rounding error) tt_um_mac (MAC) tt_um_dpmu (DPMU) tt_um_JAC_EE_segdecode (7 Segment Decode) tt_um_yuri_panchul_sea_battle_vga_game (Sea Battle) tt_um_benpayne_ps2_decoder (PS2 Decoder) tt_um_meriac_play_tune (Super Mario Tune on A Piezo Speaker) tt_um_comm_ic_bhavuk (Comm_IC) tt_um_daosvik_aesinvsbox (AES Inverse S-box) tt_um_cattuto_sr_latch (TT08 - experiments with latch-based shift registers) tt_um_silice (Warp) tt_um_jayjaywong12 (mulmul) tt_um_emmyxu_obstacle_detection (Obstacle Detection) tt_um_neural_navigators (Neural Net ASIC) tt_um_resfuzzy (resfuzzy) tt_um_cejmu (CEJMU Beers and Adders) tt_um_16_mic_beamformer_arghunter (16 Mic Beamformer) tt_um_pdm_pitch_filter_arghunter (PDM Pitch Filter) tt_um_pdm_correlator_arghunter (PDM Correlator) tt_um_ddc_arghunter (DDC) tt_um_i2s_to_pwm_arghunter (I2S to PWM ) tt_um_supermic_arghunter (Supermic ) tt_um_dmtd_arghunter (DMTD ) tt_um_htfab_bouncy_capsule (Bouncy Capsule) tt_um_samuelm_pwm_generator (PWM generator) tt_um_toivoh_demo_deluxe (Sequential Shadows Deluxe [TT08 demo competition]) tt_um_faramire_stopwatch (Simple Stopwatch) tt_um_johshoff_metaballs (Metaballs) tt_um_top (Flame demo) tt_um_NicklausThompson_SkyKing (SkyKing Demo) tt_um_Electom_cla_4bits (4-bit CLA) tt_um_vga_cbtest (Generate VGA output for Color Blindness Test) tt_um_zoom_zoom (Zoom Zoom) tt_um_dpmunit (DPM_Unit) tt_um_clock_divider_arghunter (Clock Divider ) tt_um_dlmiles_poc_fskmodem_hdlctrx (FSK Modem +HDLC +UART (PoC)) tt_um_emilian_muxpga (TinyFPGA resubmit for TT08) tt_um_pyamnihc_dummy_counter (Dummy Counter) tt_um_whynot (Why not?) tt_um_dlmiles_tt08_poc_uart (UART) tt_um_dendraws_donut (donut) tt_um_tmkong_rgb_mixer (RGB Mixer) tt_um_led_matrix_ayla_lin (32x8 LED Matrix Animation) tt_um_rebeccargb_tt09ball_screensaver (TT09Ball VGA Screensaver) tt_um_rebeccargb_vga_pride (VGA Pride) tt_um_levenshtein (Fuzzy Search Engine) tt_um_rebeccargb_colorbars (Color Bars) tt_um_jamesrosssharp_1bitam (1bit_am_sdr) tt_um_rebeccargb_hardware_utf8 (Hardware UTF Encoder/Decoder) tt_um_rebeccargb_styler (Styler) tt_um_rebeccargb_vga_timing_experiments (VGA Timing Experiments) tt_um_rebeccargb_universal_decoder (Universal Binary to Segment Decoder) tt_um_rebeccargb_intercal_alu (INTERCAL ALU) tt_um_toivoh_pio_ram_emu_example (pio-ram-emulator example: Julia fractal) tt_um_tobimckellar_top (Simple PWM Module) tt_um_JesusMinguillon_freqSweep (freqSweep) tt_um_led_cipher (LED Bitserial Cipher) tt_um_my_elevator (Elevator Design) tt_um_wokwi_413387065339458561 (APA102 to WS2812 Translator) tt_um_wokwi_413386991502909441 (SPI Logic Analyzer with Charlieplexed Display) tt_um_alf19185_ALU (4 bit ALU ) tt_um_rtfb_collatz (Collatz conjecture brute-forcer) tt_um_senolgulgonul (Senol Gulgonul tt09) tt_um_Esteban_Oman_Mendoza_maze_2024_top (Space Detective Maze Explorer) tt_um_sebastienparadis_hamming_top (Hamming Code (7,4)) tt_um_prefix8 (tiny-tapeout-8bit-GPTPrefixCircuit) tt_um_lif_tk (LIF on a Ring Topology) tt_um_asheldon44_dsm_decimation_filter (Delta-Sigma ADC Decimation Filter) tt_um_juarez_jimenez (an lfsr with synaptic neurons (excitatory or inhibitatory)) tt_um_lif_clarencechan28 (Perceptron) tt_um_uart_mvm (Matmul System) tt_um_algofoogle_tt09_ring_osc (Verilog ring oscillator) tt_um_pid_controller (PID Controller) tt_um_frequency_counter (Frequency Counter SSD1306 OLED) tt_um_delta_liafn (Delta RNN and Leaky Integrate-and-Fire Nueron Circuit) tt_um_devinatkin_basys3_uart (Basys 3 Over UART Link) tt_um_pwm_top (Generador PWM multiproposito con frecuencia y ciclo de trabajo modulable) tt_um_lfsr_stevej (Linear Feedback Shift Register) tt_um_jamesrosssharp_tiny1bitam (Tiny 1-bit AM Radio) tt_um_instrumented_ring_oscillator (instrumented_ring_oscillator) tt_um_lif1 (STDP Circuit) tt_um_alif (3 Neuron ALIF) tt_um_tiny_ternary_tapeout (T3 (Tiny Ternary Tapeout)) tt_um_snn_with_delays_paolaunisa (ChatGPT-generated Spiking Neural Network with Delays) tt_um_arandomdev_fir_engine_top (FIREngine) tt_um_carryskip_adder8 (8-bit carry-skip) tt_um_riscv_mini (RISC-V Mini) tt_um_CLA8 (8-bit Carry Look-Ahead Adder) tt_um_hybrid_adder (Hybrid_Adder_8bit) tt_um_uart_mvm_sys (Matmul System) tt_um_MichaelBell_hd_8b10b (8b10b decoder and multiplier) tt_um_program_counter_top_level (Test Design 1) tt_um_murmann_group (Decimation Filter for Incremental and Regular Delta-Sigma Modulators) tt_um_adder_accumulator_sathworld (adder-accumulator) tt_um_control_block (ECE 298A 8-Bit CPU Control Block) tt_um_LFSR_Encrypt (LFSR Encrypter) tt_um_cdc_test (SkyKing Demo) tt_um_two_lif_stdp (Two LIF Neurons with STDP Learning) tt_um_underserved (ITS-RISCV) tt_um_znah_vga_ca (znah_vga_ca) tt_um_mikegoelzer_7segmentbyte (7-Segment Byte Display) tt_um_idann (Forward Pass Network for Simple ANN) tt_um_carryskip_adder9 (carry skip adder) tt_um_mroblesh (Frequency Encoder and Decoder) tt_um_wokwi_411379488132926465 (Semana UCU Verilog) tt_um_rejunity_atari2600 (Atari 2600) tt_um_rejunity_z80 (Zilog Z80) tt_um_couchand_cora16 (CORA-16) tt_um_kashmaster_carryskip (8-bit-CARRY_SKIP) tt_um_tiny_ternary_tapeout_csa (T3 (Tiny Ternary Tapeout) CSA ) tt_um_array_secD7 (Tiny Tapeout Group 7 Lab D) tt_um_chip4lyfe (Leaky Integrate Fire Neuron) tt_um_ronikant_jeremykam_tinyregisters (Tiny Registers) tt_um_VanceWiberg_top (Team 17's 8 bit DAC) tt_um_claudiotalarico_counter (4-bit up/down binary counter) tt_um_gmejiamtz (Configurable Logic Block) tt_um_I2C (I2C and SPI) tt_um_perceptron_mtchun (Perceptron Neuron) tt_um_histogramming (Histogramming) tt_um_gfcwfzkm_scope_bfh_mht1_3 (Basic Oszilloscope and Signal Generator) tt_um_MichaelBell_rle_vga (RLE Video Player) tt_um_ece298a_8_bit_cpu_top (8-Bit CPU) tt_um_Coline3003_top (15 channels emission counter) tt_um_dlmiles_dffram32x8_2r1w (Tiny RAM DFF 2r1w) tt_um_urish_sic1 (SIC-1 8-bit SUBLEQ Single Instruction Computer) tt_um_Coline3003_spect_top (Spectrogram extractor, 2 channels) tt_um_CarrySelect8bit (carry_select) tt_um_koggestone_adder8 (test_friday2) tt_um_Rapoport (Perceptron) tt_um_cellular_alchemist (Hopfield Network with Izhikevich-type RS and FS Neurons) tt_um_tinysynth (Tinysynth) tt_um_wokwi_414120248222232577 (A Tale of Two NCOs) tt_um_a1k0n_nyancat (VGA Nyan Cat) tt_um_tommythorn_workshop (Workshop demo) tt_um_lrc_stevej (LRC - Longitudinal Redundancy Check generator) tt_um_shifter (Shifter) tt_um_schoeberl_test (tinydsp-lol) tt_um_anislam (Leaky integrate and fire spiking neural network) tt_um_systolicLif (Basic model for Systollic array implementation of LIF) tt_um_algofoogle_tt09_ring_osc2 (Verilog ring oscillator V2) tt_um_dff_mem (dff_mem) tt_um_nomuwill (16 Bit Izhikevich Neuron) tt_um_digital_clock_example (7-Segment Digital Desk Clock) tt_um_udxs (Basic Perceptron + ReLU) tt_um_matrix_mult (Basic Matrix-Vector Multiplication) tt_um_db_MAC (8 bit MAC Unit) tt_um_anas_7193 (Programmable PWM Generator) tt_um_flyingfish800 (Verilog test project) tt_um_project_tt09 (Basic LIF Neuron) tt_um_lifn (Integrate-and-Fire Neuron Circuit) tt_um_rejunity_e2m0_x_i8_matmul (E2M0 x INT8 Systolic Array) tt_um_michaelmcculloch_alu (Michaels Tiny Tapeout ALU) tt_um_dog_BILBO (8-bit CBILBO) tt_um_stochastic_integrator_tt9_CL123abc (Stochastic Integrator) tt_um_samkho_two_channel_square_wave_generator (TwoChannelSquareWaveGenerator) tt_um_urish_giant_ringosc (Giant Ring Oscillator (3853 inverters)) tt_um_htfab_caterpillar (Simon's Caterpillar) tt_um_purdue_socet_uart (SoCET UART with FIFO buffers) tt_um_rejunity_sn76489 (Classic 8-bit era Programmable Sound Generator SN76489) tt_um_rejunity_ay8913 (Classic 8-bit era Programmable Sound Generator AY-3-8913) tt_um_tommythorn_cgates (Cgates) tt_um_09eksdee (eksdee) tt_um_rejunity_decoder (ternary, E1M0, E2M0 decoders) tt_um_kailinsley (Dynamic Threshold Leaky Integrate-and-Fire) tt_um_rejunity_vga_test01 (VGA Drop (audio/visual demo)) tt_um_wallento_4bit_toycpu (4-Bit Toy CPU) tt_um_warp (Warp) tt_um_algofoogle_tt09_ring_osc3 (Verilog ring oscillator V3) tt_um_kev_ma_matmult222 (2-bit 2x2 Matrix Multiplier) tt_um_rejunity_vga_logo (VGA Tiny Logo (1 tile)) tt_um_liaf (A simple leaky integrate and fire neuron) tt_um_lif_network_MR (Leaky Neuron Network) tt_um_lsnn_hschweig (Neuromorphic Hardware for SNN LSTM) tt_um_Nishanth_RISCV (RISCV Processor Design) tt_um_KoushikCSN_RISCV (RISCV Processor Design) tt_um_ccu_goatgate (tiny cipher 4 bit key) tt_um_lif_ZB (Tutorial: Simple LIF Neuron) tt_um_z2a_rgb_mixer (RGB Mixer demo) tt_um_vga_clock (VGA clock) tt_um_synth_simple_mm (synth_simple) tt_um_gus16 (GUS16 CPU) tt_um_rejunity_ternary_dot (Ternary 128-element Dot Product) tt_um_virantha_enigma (Enigma - 52-bit Key Length) tt_um_atomNPU (AtomNPU) tt_um_alphaonesoc (AlphaOneSoC) tt_um_gxrii_spi_sevenseg (SPI 7-segment display) tt_um_urish_simon (Simon Says memory game) tt_um_branch_pred (TinyTapeout Minimal Branch Predictor) tt_um_xor_encryption (Xor-Logic) tt_um_MAC_Accelerator_OnSachinSharma (MAC Operation) tt_um_moody_mimosa (Moody-mimosa) tt_um_wrapper (6Digit7SegClock) tt_um_MichaelBell_tinyQV (TinyQV Risc-V SoC) tt_um_devmonk_ay8913 (Classic 8-bit era Programmable Sound Generator AY-3-8913) tt_um_toivoh_demo_tt10 (Orion Iron Ion [TT08 demo competition]) tt_um_2048_vga_game (2048 sliding tile puzzle game (VGA)) tt_um_gamepad_pmod_demo (Gamepad Pmod Demo) tt_um_tinytapeout_logo_screensaver (VGA Screensaver with Tiny Tapeout Logo) tt_um_mattvenn_spi_test (SPI test) tt_um_huffman_coder (Huffmann_Coder) tt_um_multiplier_tt10 (Vedic multiplier) tt_um_schoeberl_wildcat (Wildcat RISC-V) tt_um_kentrane_tinyspectrum (Tiny piano) tt_um_i2c_regf (Asynchronous I2C Registerfile Interface) tt_um_tappu_tobias1012 (Tappu) tt_um_mp_lif_schor (mp_LIF_neuron) tt_um_asgerwenneb (Custom SRAM) tt_um_Strider93 (digital LIF Neuron) tt_um_wokwi_422960078645704705 (Hero on Tape) tt_um_keszocze_ssmcl (SSMCl) tt_um_luke_clock (TT10_Luke_Clock) tt_um_enjens (Verilog based clock to 7-segment counter) tt_um_UartMain (XOR Cipher) tt_um_torurstrom_async_lock (Asynchronous Locking Unit) tt_um_larva (LaRVa CPU) tt_um_zhouzhouthezhou_adder (tt10_zhouzhouthezhou_adder) tt_um_jp_cd101_saw (KCH CD101 Saw Synth) tt_um_hpdl1414_uart_atudoroi (TT10 HPDL 1414 Uart) tt_um_jun1okamura_test0 (7-segment with LFSR) tt_um_strau0106_simple_viii (simple-viii) tt_um_obriensp_jtag (JTAG TAP) tt_um_10_vga_crossyroad (Crossyroad) tt_um_bilal_trng (TRNG) tt_um_space_invaders_game (Space Invaders ASIC) tt_um_sushi_demo (zc-sushi-demo) tt_um_kch_cd101 (kch cd101) tt_um_uart_bgdtanasa (ttUART) tt_um_zedulo_spitest1 (SimpleSPIdev) tt_um_daobaanh_rng (RNG_test) tt_um_gcd_stephan (15bit GCD) tt_um_spacewar (XY Spacewar) tt_um_gregac_tiny_nn (Tiny Neural Network Accelerator) tt_um_log_afpm (16-bit Logarithmic Approximate Floating Point Multiplier) tt_um_rkarl_Spiral (TT_spiralPattern) tt_um_led_jellyant (ledtest) tt_um_project_tt10 (Simple shift Reg) tt_um_DaDDS (DaDDS) tt_um_nithishreddykvs (Pulse Width Modulation) tt_um_monishvr_fifo (Synchronous FIFO) tt_um_reemashivva_fifo (Asynchronous FIFO) tt_um_save_buffer_hash_table (Tiny Hash Table) tt_um_drum_goekce (DRUM) tt_um_rte_sine_synth (Sine Synth) tt_um_tiny_shader_mole99 (Tiny Shader) tt_um_flummer_ltc (Linear Timecode (LTC) generator) tt_um_bitty (Bitty) tt_um_ole_moller_priority_encoder_to_7_segment_decoder (Priority-encoder) tt_um_algofoogle_vga (IHP VGA demo) tt_um_ultra_tiny_cpu (UltraTiny-CPU) tt_um_uwasic_dinogame (UW ASIC - Optimized Dino) tt_um_Qwendu_spi_fpu (SPI FPU) tt_um_aditya_patra (Priority-Encoded Arbiter) tt_um_4_bit_ALU (ALU) tt_um_htfab_checkers (Overengineered Checkers) tt_um_brukstus_tdc_with_spi (TDC with SPI) tt_um_toniklippeo (toni_clk_gen) tt_um_spi_pwm_djuara (spi_pwm) tt_um_iitbbs (CYCLIPSONIC) tt_um_wokwi_411783629732984833 (BINCounterAndGates) tt_um_wokwi_412635532198550529 (tt09-pettit-wokproc-trainer) tt_um_wokwi_413385294512575489 (Duffy) tt_um_wokwi_413387014781302785 (L display) tt_um_wokwi_413387093939376129 (sphereinabox hello) tt_um_wokwi_413387190167208961 (Will It NAND?) tt_um_wokwi_group_1 tt_um_wokwi_group_2 tt_um_wokwi_group_3 tt_um_wokwi_group_4 tt_um_wokwi_group_5 tt_um_wokwi_group_6 tt_um_wokwi_group_7 tt_um_wokwi_group_8 tt_um_wokwi_group_9 tt_um_wokwi_group_10 tt_um_wokwi_group_11 tt_um_wokwi_group_12 tt_um_tetrap_triggerer (triggerer) tt_um_wokwi_group_13 tt_um_multiplier_group_1 tt_um_multiplier_group_2 tt_um_multiplier_group_3