The 4-Bit ALU
module is a digital system designed to perform various arithmetic and logical operations on 4-bit binary numbers. It supports operations such as addition, subtraction, multiplication, division, and several logical operations. Additionally, it includes an encryption function that can be used to encrypt 4-bit inputs using an 8-bit key.
The module accepts two 4-bit binary numbers, a
and b
, and a 4-bit operation code (opcode
) that determines the operation to be performed. The results are then output through the uo_out
wire, while additional status information, such as carry out and overflow, is output through the uio_out
wire. The uio_oe
wire controls the enable or disable functionality for the uio_in
and uio_out
wires.
a
and b
, producing a 4-bit result and a carry out.b
from a
, producing a 4-bit result and a borrow indication.a
and b
, producing an 8-bit result.a
by b
, producing a 4-bit quotient and remainder. Division by zero is handled by returning a zero result.a
and b
.a
and b
.a
and b
.a
, with b
being ignored.ENC: Encrypts the inputs a
and b
using an 8-bit key derived from concatenating a
and b
(treated as an 8-bit value). The encryption function applies an XOR operation between this 8-bit concatenated value and a fixed 8-bit key (KEY
). The result is an 8-bit encrypted value.
Encryption Details:
a
and b
(forming an 8-bit value) is XORed with the fixed 8-bit key.To test the 4-Bit ALU
module, follow these steps:
Connect Inputs:
ui_in
wire to the 4-bit inputs a
and b
.uio_in
wire to the 4-bit opcode
.Connect Outputs:
uo_out
wire to an 8-bit output display or register to observe the operation result.uio_out
wire to observe the carry out and overflow status.Signal Management:
ena
signal is active (high).clk
input.rst_n
signal to reset the module by pulling it low.Operation Testing:
opcode
values and corresponding a
and b
inputs to verify the correct operation of the module.a
and b
are combined and XORed with the fixed key. Verify that the result matches expected encrypted values.# | Input | Output | Bidirectional |
---|---|---|---|
0 | a[0] | result[0] | opcode[0] |
1 | a[1] | result[1] | opcode[1] |
2 | a[2] | result[2] | opcode[2] |
3 | a[3] | result[3] | opcode[3] |
4 | b[0] | result[4] | |
5 | b[1] | result[5] | |
6 | b[2] | result[6] | carry_out |
7 | b[3] | result[7] | overflow |