The TT10 Luke Clock project implements a VGA-based binary clock using Chisel. The clock displays hours, minutes, and seconds in a binary format using a matrix of squares, which updates every second. Each colums shows the binary value of a digit of the time in the format HH:MM:SS.
ui_in(0)
: Select time clock source [bit 0]ui_in(1)
: Select time clock source [bit 1]
00
: Use internal clock (if set at 25.175 MHz)01
: Use internal clock (if set at 25 MHz)10
: Use external 32.768 kHz clock from ui_in(2)
11
: Use external 1 Hz clock from ui_in(3)
ui_in(2)
: Time clock 1Hz
ui_in(3)
: Time clock 32768Hz
ui_in(4)
: Plus
– Used to set the clock or change layout (deoending on select mode inputs)ui_in(5)
: Minus (button)
– Used to set the clock or change layout (deoending on select mode inputs)ui_in(6)
: Select mode [bit 0]ui_in(7)
: Select mode [bit 1]
00
: Adjust seconds (Plus: clear seconds, Minus: clear seconds)01
: Adjust minutes (Plus: increase minutes, Minus: decrease minutes)10
: Adjust hours plus: (Plus: increase hours, Minus: decrease hours)11
: Switch layout/color (Plus: changes layout, Minus: changes colors)The outputs are uused to connect the VGA monitor. They are compatible with with the TT VGA PMOD interface.
uo_out(0)
: Red [bit 1]uo_out(1)
: Green [bit 1]uo_out(2)
: Blue [bit 1]uo_out(3)
: Vertical syncuo_out(4)
: Red [bit 0]uo_out(5)
: Green [bit 0]uo_out(6)
: Blue [bit 0]uo_out(7)
: Horizontal syncThe following bidirectionals (all used as output) provide debugging information for internal signals.
uio_out(0)
: (Debug output) tClkuio_out(1)
: (Debug output) cntReg [bit 0]uio_out(2)
: (Debug output) cntReg [bit 1]uio_out(3)
: (Debug output) cntReg [bit 2]uio_out(4)
: (Debug output) cntReg [bit 3]uio_out(5)
: (Debug output) inDisplayAreauio_out(6)
: (Debug output) modeReg [bit 0]uio_out(7)
: (Debug output) modeReg [bit 1]# | Input | Output | Bidirectional |
---|---|---|---|
0 | select time clock source [bit 0] (switch) | red [bit 1] | (debug output) tClk |
1 | select time clock source [bit 1] (switch) | green [bit 1] | (debug output) cntReg [bit 0] |
2 | time clock 1Hz | blue [bit 1] | (debug output) cntReg [bit 1] |
3 | time clock 32768Hz | vsync | (debug output) cntReg [bit 2] |
4 | plus (button) | red [bit 0] | (debug output) cntReg [bit 3] |
5 | minus (button) | green [bit 0] | (debug output) inDisplayArea |
6 | select mode [bit 0] (switch) | blue [bit 0] | (debug output) modeReg [bit 0] |
7 | select mode [bit 1] (switch) | hsync | (debug output) modeReg [bit 1] |