The UltraTiny-CPU is a minimal 8-bit CPU with a small instruction set (ALU, data flow, and control flow). It has:
The CPU features a “load mode” that writes data or instructions into the memory and a “run mode” that fetches and executes those instructions:
Load Mode:
ui[7] == 1
.ui[3:0]
.uio[7:0]
and written into memory.Run Mode:
ui[7] == 0
and ena == 1
.PC
, decodes it, performs the operation (arithmetic, logic, load/store, or branch), and increments or modifies PC
accordingly.ACC
), and its value is driven onto uo[7:0]
.Enter Load Mode (ui[7] = 1
):
ui[3:0]
.uio[7:0]
.clk
to store that byte into internal memory.Run the Program:
ui[7] = 0
).ena = 1
(the CPU is enabled).uo[7:0]
to see results of execution.If your design environment simulates clocking and signals, you can watch the memory load process and the CPU fetch/execute cycle in a waveform viewer or on actual hardware.
No external hardware is strictly required. The UltraTiny-CPU operates solely with its on-chip 16-byte memory and the provided I/O pins. You can optionally attach an external logic analyzer or an LED display to the accumulator outputs (uo[7:0]
) if you want a visual indication of the CPU state. Otherwise, all interfacing can be done directly via the pin signals.
# | Input | Output | Bidirectional |
---|---|---|---|
0 | Memory load address bit 0 (when ui[7]=1) | Accumulator output bit 0 | Data bus bit 0 for load mode (input), otherwise tri-stated |
1 | Memory load address bit 1 (when ui[7]=1) | Accumulator output bit 1 | Data bus bit 1 for load mode (input), otherwise tri-stated |
2 | Memory load address bit 2 (when ui[7]=1) | Accumulator output bit 2 | Data bus bit 2 for load mode (input), otherwise tri-stated |
3 | Memory load address bit 3 (when ui[7]=1) | Accumulator output bit 3 | Data bus bit 3 for load mode (input), otherwise tri-stated |
4 | Unused (available for other custom inputs) | Accumulator output bit 4 | Data bus bit 4 for load mode (input), otherwise tri-stated |
5 | Unused (available for other custom inputs) | Accumulator output bit 5 | Data bus bit 5 for load mode (input), otherwise tri-stated |
6 | Unused (available for other custom inputs) | Accumulator output bit 6 | Data bus bit 6 for load mode (input), otherwise tri-stated |
7 | Load mode enable (1=program load, 0=run) | Accumulator output bit 7 | Data bus bit 7 for load mode (input), otherwise tri-stated |