This project includes a RISC-V CPU (LaRVa) with a serial port and a few more peripherals. Memory has to be provided externally. An included bootloader allows the execution of programs loaded through the serial port. (See TinyTlaRVa.pdf file) As a last addition a JTAG interface is also included. (See jtag_laRVaTT.pdf file)
Connect a serial port 8-bit, no parity, 115200 bps, and send an 'L'. The bootloader code should reply with another 'L'. For more complete tests an external board with SRAM memory and address latches has to be attached to the PMOD ports of the prototype board. Also, some testing could be carried out using the JTAG port.
A memory board has to be attached to user PMOD connectors.
https://www.ele.uva.es/~jesus/larva.pdf
https://www.ele.uva.es/~jesus/larva_perif.pdf
# | Input | Output | Bidirectional |
---|---|---|---|
0 | tck | xbh | xd[0] |
1 | tms | xlal | xd[1] |
2 | tdi | xlal | xd[2] |
3 | rxd | pwmout_tdo | xd[3] |
4 | gpi[0] | txd | xd[4] |
5 | gpi[1] | xhh | xd[5] |
6 | gpi[2] | xoeb | xd[6] |
7 | gpi[3] | xweb | xd[7] |