786 AlphaOneSoC
786 : AlphaOneSoC
- Author: Abhiram Gopal Dasika
- Description: A 32-bit RISC-V SoC, based on TinyQV by Michael Bell
- GitHub repository
- Open in 3D viewer
- Clock: 64000000 Hz
How it works
A simple 32-bit RISC-V SoC on the RV32EC ISA, the project works by flashing the instruction code into the memory and observing the outputs over your desired method, via GPIO, UART or SPI The TT10-IHP submission is based entirely on MichaelBell's TinyQV from TT-06.
How to test
Flash the PMOD with instructions (somehow) and boot up the processor. The processor will start executing the instructions
External hardware
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | Interrupt 0 | UART TX | Flash CS |
| 1 | Interrupt 1 | UART RTS | SD0 |
| 2 | SPI MISO | SPI DC | SD1 |
| 3 | GPI3 | SPI MOSI | SCK |
| 4 | GPI4 | SPI CS | SD2 |
| 5 | GPI5 | SPI SCK | SD3 |
| 6 | GPI6 | Debug UART TX | RAM A CS |
| 7 | UART RX | Debug Signal | RAM B CS |