Typical Verilog design that generates VGA timing and RGB222 colour outputs compatible with the Tiny VGA PMOD.
It produces a bouncing ball animation over the top of an adaptation of Matt Venn's VGA clock, from here: https://github.com/mattvenn/tt08-vga-clock
mode
input to 0, i.e. specifying 640x480 60Hz from a 25MHz clock.show_clock
input to 1.pmod_select
input to 0 for Tiny VGA PMOD. Otherwise, 1=Matt's VGA Clock PMOD.adj_*
inputs to adjust hours, minutes, or seconds.Tiny VGA PMOD and VGA monitor is all you should need externally.
# | Input | Output | Bidirectional |
---|---|---|---|
0 | adj_hrs | r1 | hmax |
1 | adj_min | g1 | vmax |
2 | adj_sec | b1 | hblank |
3 | vsync | vblank | |
4 | r0 | visible | |
5 | g0 | ||
6 | b0 | ||
7 | mode | hsync |