450 Brainf*ck ASIC
450 : Brainf*ck ASIC
- Author: Matt Prock
- Description: A Brainf*ck interpreter on a chip! Uses external SPI RAM for the tape, 2-wire serial for user I/O and interrupt-driven bracket handling via MCU collaboration.
- GitHub repository
- Open in 3D viewer
- Clock: 40000000 Hz
How it works
Main Module
The ASIC executes Brainfuck instructions using the RP2040 for user I/O and SPI "tape". Each 3-bit instruction is decoded into data operations (+/-), pointer operations (</>), I/O operations (,/.), or bracket operations ([/]).
The design features a 9-byte data cache with SPI RAM backend for the full 1024-byte tape. When the pointer moves beyond the cached window, the ASIC writes old data to SPI and fetches new data in 5-byte bursts.
The 8-deep bracket stack supports nested loops with interrupt-driven jump handling. Bracket operations collaborate with the MCU:
[with data=0: ASIC triggersinterrupt_jumpand enables RX. MCU sends PC of matching]via 10-bit serial.[with data≠0: ASIC pushes PC to bracket stack and continues (enter loop).]with data=0: ASIC pops bracket stack and continues (exit loop).]with data≠0: ASIC triggersinterrupt_jumpand transmits top of bracket stack via 10-bit serial TX. MCU resumes from that PC (loop back).
Two interrupt signals notify the MCU: interrupt_jump for bracket operations requiring PC transmission, and interrupt_io for user I/O. Communication between the BF ASIC and RP2040 occurs over two 2-wire serial interfaces (10-bit RX/TX for PC values and data) and SPI for the "tape" memory. The MCU monitors interrupts to handle I/O and jump requests.
Main State machine
How to test
-
Write some BF (Like this echo loop ,[.,])
-
Use the following encoding to translate it to what the BF_ASIC can understand:
'-' => "000" '+' => "001" '<' => "010" '>' => "011" '[' => "100" ']' => "101" ',' => "110" '.' => "111"Heres a python script to process .b files: link
-
Connect to the pico via UART for I/O
-
++++++++++[>+++++++>++++++++++>+++<<<-]>++.>+.+++++++..+++.>++.<<+++++++++++++++.>.+++.------.--------.>+.>++++++++++. -
hello world!
External hardware
-
The TT I/O board including the RP2040 / RP2350
-
RP2xx0 with this firmware installed
-
A protoboard, wires, and patience
Credit for SPI firmware: https://github.com/MichaelBell/spi-ram-emu
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | instruction[0] | tx_bit | spi_cs |
| 1 | instruction[1] | tx_clk | spi_mosi |
| 2 | instruction[2] | interrupt_io | spi_miso |
| 3 | instr_valid | interrupt_jump | spi_sck |
| 4 | rx_clk | inspect_data[0] | inspect_data[4] |
| 5 | rx_bit | inspect_data[1] | inspect_data[5] |
| 6 | inspect_sel[0] | inspect_data[2] | inspect_data[6] |
| 7 | inspect_sel[1] | inspect_data[3] | inspect_data[7] |