
The electronic voting machine (EVM) design counts votes for three candidates. Each candidate has one input button — pressing it increments that candidate’s vote count. When the vote_over signal is asserted, the voting process ends, and results for all three candidates are displayed as 6-bit binary outputs (o_count1, o_count2, o_count3).A reset (rst) signal clears all counts, preparing the system for a new voting session.
The testbench (tb_voting_machine) generates a clock and reset, then simulates button presses for all three candidates. Each press and release represents a vote, and after several votes, the vote_over signal is asserted to stop voting. Finally, it displays the total vote counts for each candidate and dumps all signals into a VCD file for waveform viewing.
List external hardware used in your project (e.g. PMOD, LED display, etc), if any
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | a[0] | b[0] | c[0] |
| 1 | a[1] | b[1] | c[1] |
| 2 | a[2] | b[2] | c[2] |
| 3 | a[3] | b[3] | c[3] |
| 4 | a[4] | b[4] | c[4] |
| 5 | a[5] | b[5] | c[5] |
| 6 | a[6] | b[6] | c[6] |
| 7 | a[7] | b[7] | c[7] |