
This project implements a simple VGA pattern generator that produces colorful geometric visuals on a monitor.
The logic generates standard 640×480 @ 60 Hz VGA timing signals (HSYNC, VSYNC, front/back porch, and visible area)
using horizontal and vertical counters implemented in Verilog.
The color output is created procedurally from the pixel coordinates.
Each pixel’s RGB values are computed based on bitwise operations such as XOR and pattern masks, resulting in
different shapes and wave-like effects.
Six output bits (R1, G1, B1, R0, G0, B0) form a 6-bit color depth (2 bits per channel), providing 64 distinct colors.
The three least significant input bits (ui_in[2:0]) select between different visual modes such as
checkerboard, moiré lines, plasma gradients, and pseudo-random noise.
The remaining upper bits (ui_in[7:3]) modify palette or variation parameters.
Each frame is generated in real time using a 25 MHz pixel clock.
Simulation (recommended)
You can simulate the design using the included cocotb testbench:
cd test
make -B
This produces a preview file called frame_200x150.ppm, which contains a portion of the generated VGA image. Open the PPM file with any image viewer to see the visual pattern. Changing the value of dut.ui_in.value inside test/test.py allows you to test other pattern modes.
Hardware testing <br> After fabrication, connect the chip or TinyTapeout demo board to a TinyVGA PMOD adapter:
Expected behavior: The monitor displays colorful geometric or dynamic-looking patterns, changing instantly when input switches are toggled.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | Pattern select bit 0 | Red MSB | |
| 1 | Pattern select bit 1 | Green MSB | |
| 2 | Pattern select bit 2 | Blue MSB | |
| 3 | Palette / variation 0 | VSync (active low) | |
| 4 | Palette / variation 1 | Red LSB | |
| 5 | Palette / variation 2 | Green LSB | |
| 6 | Palette / variation 3 | Blue LSB | |
| 7 | Palette / variation 4 | HSync (active low) |