52 Karplus-Strong String Synthesis

52 : Karplus-Strong String Synthesis

Design render
  • Author: Chinmay Patil
  • Description: Plucked string sound synthesizer
  • GitHub repository
  • Clock: 256000 Hz

How it works

This is simplified implementation of Karplus-Strong (KS) string synthesis based on papers, Digital Synthesis of Plucked-String and Drum Timbres and Extensions of the Karplus-Strong Plucked-String Algorithm.

A register map controls and configures the KS synthesis module. This register map is accessed through a SPI interface. Synthesized sound samples can be accessed through the I2S transmitter interface.

SPI Frame

SPI Mode: CPOL = 0, CPHA = 1

The 16-bit SPI frame is defined as,

$\text{Read}/\overline{\text{Write}}$ $\text{Address[6:0]}$ $\text{Data[7:0]}$

Register Map

The Register Map has 16 Registers of 8-bits each. It is divided into configuration and status registers,

Complete register map is described in the repository at https://github.com/pyamnihc/tt04-um-ks-pyamnihc.

I2S Transmitter

The 8-bit signed sound samples can be read out at f_sck = 256 kHz through this interface.

How to test

Connect a clock with frequency f_clk = 256 kHz and apply a reset cycle to initialize the design, this sets the audio sample rate at fs = 16 kHz. Use the spi register map or the ui_in to futher configure the design. The synthesized samples are sent continuously on the I2S transmitter interface.

IO

#InputOutputBidirectional
0~rst_n_prbs_15, ~rst_n_prbs_7segment asck_i
1load_prbs_15, load_prbs_7segment bsdi_i
2freeze_prbs_15segment csdo_o
3freeze_prbs_7segment dcs_ni
4i2s_noise_selsegment ei2s_sck_o
5~rst_n_ks_stringsegment fi2s_ws_o
6plucksegment gi2s_sd_o
7NOT CONNECTEDdotprbs_15

Chip location

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