357 Poor Person's Boundary Scan

357 : Poor Person's Boundary Scan

Design render
  • Author: Verneri Hirvonen
  • Description: JTAG test logic with a 8-bit TDR for 'external' boundary scan
  • GitHub repository
  • Clock: 0 Hz

How it works

The design contains JTAG test logic with four test data registers:

1. boundary_scan
2. blink_in
3. blink_out
4. blink_dir

boundary_scan is connected between fixed input and output registers and can be used to either read the input pins or drive the output pins.

blink_in, blink_out, and blink_dir are connected to pins 6 and 7 of the bidirectional IO and can be used to read/write the bidirectional pins.

The default clk and rst_n are left unconnected because the JTAG interface provides its own clock and reset and those are routed through user IO.

How to test

The cocotb simulation contains helper routines for driving the JTAG state machine and can be used as a example of how to shift values into different JTAG internal registers.

In general the design is controlled with the following procedure:

1. Reset core either through the TRSTn input or through a reset sequence on TMS. The reset sequence is achieved by holding TMS high and cycling TCK at least 5 times.
2. Shift in IR value to select appropriate TDR
3. Shift bits to TDR to read/write its value.

Blinky pins are controlled with the following JTAG TDRs. Each TDR is two bits wide.

- blink_in  IR=0x02 = blink pin inputs
- blink_out IR=0x03 = blink pin outputs
- blink_dir IR=0x04 = blink pin directions, high = output, low = input

For example, to assign blink[0] high and blinky[1] low, execute the following sequence:

1. Shift 0x04 to IR to select blink_dir TDR
2. Shift 0b11 to the selected TDR to set both pins as outputs
3. Shift 0x02 to IR to select blink_in TDR
4. Shift 0b01 to set blink[0] to high and blink[1] to low

External hardware

JTAG debug adapter

IO

#InputOutputBidirectional
0boundary_scan input 0boundary_scan output 0JTAG TCK (hardcoded input)
1boundary_scan input 1boundary_scan output 1JTAG TMS (hardcoded input)
2boundary_scan input 2boundary_scan output 2JTAG TDI (hardcoded input)
3boundary_scan input 3boundary_scan output 3JTAG TRSTn (hardcoded input)
4boundary_scan input 4boundary_scan output 4JTAG TDO (hardcoded output)
5boundary_scan input 5boundary_scan output 5JTAG state machine in state Test-Logic Reset (hardcoded output)
6boundary_scan input 6boundary_scan output 6Blink pin 0 (bidirectional)
7boundary_scan input 7boundary_scan output 7Blink pin 1 (bidirectional)

Chip location

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