267 OpAmp 3stage
267 : OpAmp 3stage
- Author: Rod Burt
- Description: 3stage PMOS OpAmp
- GitHub repository
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- Clock: 0 Hz
- Feedback: ✅ 1
How it works
A test chip for a 3stage PMOS OpAmp.
How to test
Pinout: out -> ua[0], in- -> ua[1], in+ -> ua[2]
External hardware
Typical analog bench setup.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | |||
| 1 | |||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |
Analog pins
ua | PCB Pin | Internal index | Description |
|---|---|---|---|
| 0 | W | 7 | out |
| 1 | T | 9 | in- |
| 2 | U | 8 | in+ |
User feedback
- rburt16👑: Preliminary results for GBW, Slew Rate, Vin range, and Vos are as expected. The phase margin, when connected as a buffer, is low, probably due to the specified < 500 ohm resistance connecting the analog pads reacting with the test board capacitance.