This project converts between three formats for representing values from 0 to 999:
When RESET
is LOW, this project functions in asynchronous mode. Changes to the input are immediately reflected in the output without the use of a clock signal. Input format and output format are specified separately, and only half the output is available at any moment.
# | Dedicated Input | Dedicated Output | Bidirectional I/O |
---|---|---|---|
0 | Input D8 | Output Q0/Q8 | Input D0 |
1 | Input D9 | Output Q1/Q9 | Input D1 |
2 | Input D10 | Output Q2/Q10 | Input D2 |
3 | DPD input/D11 | Output Q3/Q11 | Input D3 |
4 | BCD input | Output Q4/— | Input D4 |
5 | A0 | Output Q5/— | Input D5 |
6 | DPD output | Output Q6/— | Input D6 |
7 | BCD output | Output Q7/ERR | Input D7 |
A0
(dedicated input 5) HIGH for the most significant 2 bits and LOW for the least significant 8 bits on the dedicated outputs.A0
(dedicated input 5) HIGH for the hundreds digit and LOW for the tens and ones digits on the dedicated outputs.A0
(dedicated input 5) HIGH for the most significant 2 bits and LOW for the least significant 8 bits on the dedicated outputs.When RESET
is HIGH, this project functions in synchronous mode. Input is latched when /WE
(dedicated input 7) is LOW and CLK
is pulsed. Output is driven when /OE
(dedicated input 6) is LOW. Input format and output format are specified using the same two inputs, and the entire output is available at once.
# | Dedicated Input | Dedicated Output | Bidirectional I/O |
---|---|---|---|
0 | Input D8 | Output Q8 | Input D0/Output Q0 |
1 | Input D9 | Output Q9 | Input D1/Output Q1 |
2 | Input D10 | Output Q10 | Input D2/Output Q2 |
3 | Input D11 | Output Q11 | Input D3/Output Q3 |
4 | BCD mode | — | Input D4/Output Q4 |
5 | DPD mode | — | Input D5/Output Q5 |
6 | /OE (output enable) | — | Input D6/Output Q6 |
7 | /WE (write enable) | ERR | Input D7/Output Q7 |
/WE
and /OE
(dedicated inputs 7 and 6) HIGH.DPD
and BCD
(dedicated inputs 5 and 4) LOW./WE
LOW and pulse CLK
./WE
and /OE
(dedicated inputs 7 and 6) HIGH.DPD
(dedicated input 5) LOW and BCD
(dedicated input 4) HIGH./WE
LOW and pulse CLK
./WE
and /OE
(dedicated inputs 7 and 6) HIGH.DPD
(dedicated input 5) HIGH and BCD
(dedicated input 4) LOW./WE
LOW and pulse CLK
./WE
(dedicated input 7) HIGH and /OE
(dedicated input 6) LOW.DPD
and BCD
(dedicated inputs 5 and 4) LOW./WE
(dedicated input 7) HIGH and /OE
(dedicated input 6) LOW.DPD
(dedicated input 5) LOW and BCD
(dedicated input 4) HIGH./WE
(dedicated input 7) HIGH and /OE
(dedicated input 6) LOW.DPD
(dedicated input 5) HIGH and BCD
(dedicated input 4) LOW.The test.py
file tests conversion in all directions.
Whatever input and output devices you want.
# | Input | Output | Bidirectional |
---|---|---|---|
0 | D8 | Q8 | D0/Q0 |
1 | D9 | Q9 | D1/Q1 |
2 | D10 | Q10 | D2/Q2 |
3 | D11 | Q11 | D3/Q3 |
4 | BCD mode | D4/Q4 | |
5 | DPD mode | D5/Q5 | |
6 | /OE (output enable) | D6/Q6 | |
7 | /WE (write enable) | BCD overflow | D7/Q7 |