
This project is an 8-bit custom processor designed in Verilog. It includes essential components such as:
The processor fetches instructions, decodes them, performs operations via the ALU, and stores results. All actions are synchronized with the clock input.
To test this processor:
cd test
make
The testbench sets input values and verifies output through assertions.
You can modify the test.py file to check different inputs and behaviors.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | ALU OUT[0] | ||
| 1 | ALU OUT[1] | ||
| 2 | ALU OUT[2] | ||
| 3 | ALU OUT[3] | ||
| 4 | ALU OUT[4] | ||
| 5 | ALU OUT[5] | ||
| 6 | ALU OUT[6] | ||
| 7 | ALU OUT[7] |