355 CORDIC sin/cos generator

355 : CORDIC sin/cos generator

Design render
  • Author: Jacques Te
  • Description: Computes the sine and cosine of an 8-bit input angle using an iterative 8-stage CORDIC algorithm in Q2.6 fixed-point.
  • GitHub repository
  • Open in 3D viewer
  • Clock: 50000000 Hz

How it works

This project computes the sine and cosine of an input angle using an iterative CORDIC (COordinate Rotation DIgital Computer) algorithm.

The angle is supplied as a 7-bit value on ui[6:0], where 0127 maps linearly to 360° (so each step is 360 / 128 ≈ 2.81°). Asserting start on ui[7] begins a computation.

Internally the design works in Q2.6 fixed-point (8-bit two's-complement, where 1.0 = 64 = 0x40):

  1. Quadrant fold — the angle is reduced to the first quadrant (0°–90°), and per-quadrant sign flags are recorded so the result can be reflected back into the correct quadrant.
  2. Rotation — a vector is pre-scaled by the CORDIC gain (1/K ≈ 0.607) and rotated through 8 fixed micro-rotations of arctan(2^-i), each taken from a small lookup table. A small FSM (IDLE → LOAD → 8× COMPUTE → DONE) sequences the iterations; each iteration drives a residual-angle accumulator toward zero while the vector's X and Y components converge to cos and sin.
  3. Sign correction — the recorded quadrant flags are applied, producing the final signed sin and cos.

A result is ready roughly 11 clock cycles after start is asserted. start is a level: hold it high to recompute continuously, release it to freeze and hold the last result.

The outputs are 8-bit two's-complement Q2.6 values:

Raw (hex) Decimal Real value
0x40 +64 +1.0
0x00 0 0.0
0xC0 −64 −1.0

(Convert any output to its real value with raw / 64.)

sin appears on uo[7:0], cos on uio[7:0] (the bidirectional pins, configured as outputs).

How to test

  1. Put a 7-bit angle on ui[6:0] (0–127 = 0°–360°).
  2. Drive start (ui[7]) high to trigger a computation, then low to latch the result.
  3. After ~11 clock cycles, read sin on uo[7:0] and cos on uio[7:0]. Interpret both as signed Q2.6 (value = raw / 64).

Example angles (input code → angle → expected outputs):

ui[6:0] Angle sin (uo) cos (uio)
0 0x00 (0) 0x40 (+1.0)
16 45° 0x2E (≈0.72) 0x2C (≈0.69)
32 90° 0x41 (≈+1.0) 0x01 (≈0)
64 180° 0x00 (≈0) 0xC0 (−1.0)
96 270° 0xBF (≈−1.0) 0x01 (≈0)

Outputs are within ±a few LSB of the ideal due to the 8-iteration, 8-bit fixed-point approximation. The included cocotb test (test/test.py) sweeps all 128 angles and checks them bit-exactly against a golden CORDIC model.

External hardware

No external hardware is required to drive the design — the angle and start come from the demo board's input switches.

To view the outputs:

  • sin is on uo[7:0], which drives the demo board's 8 on-board LEDs directly.
  • cos is on uio[7:0] (the bidirectional/PMOD pins). To see it, attach an 8-bit LED PMOD (or any 8-LED breakout) to the uio header. This is optional — cos is still readable via the RP2040/test harness without it.

IO

#InputOutputBidirectional
0angle[0]sin[0]cos[0]
1angle[1]sin[1]cos[1]
2angle[2]sin[2]cos[2]
3angle[3]sin[3]cos[3]
4angle[4]sin[4]cos[4]
5angle[5]sin[5]cos[5]
6angle[6]sin[6]cos[6]
7startsin[7]cos[7]

Chip location

Controller Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux tt_um_chip_rom (Chip ROM) tt_um_factory_test (Tiny Tapeout Factory Test) tt_um_Vincent2405_adder_tree (BSD Convolution Adder Tree) tt_um_BastiBudde_i2c_slave_sensor (I2C Slave Template with Emulated Sensor) tt_um_60hz_load (60 Hz Grid-Forming ASIC with Dump-Load Control) tt_um_spi_config_reg (Simple SPI configuration for analog designs) tt_um_ex_drosen766 (Project) tt_um_spi_cpu_top (SPI-CPU) tt_um_d5smith_mfa (Music for ASICs) tt_um_i2c_master (I2C Master Controller) tt_um_aswarby_mac (Aswarby INT8 MAC) tt_um_arrakeen_spsram_direct (TT-Arrakeen-SPSRAM-direct) tt_um_alu (8-bit Interactive ALU) tt_um_JCT_PoC (ttgf jct PoC) tt_um_jct_lea (LEA-128) tt_um_cwru_cpu (CWRU CPU) tt_um_teapot (100Mbps Ethernet Accelerator Wrapper) tt_um_jte_cordic (CORDIC sin/cos generator) tt_um_aidenkoch4 (Three Channel RGB PWM Controller) tt_um_pschuetz_tremolo (Tremolo guitar pedal ASIC) tt_um_jsabree11_fibonacci_checker (fibbonaci_tt) tt_um_connerdaehler_boop (Procedural ASIC) tt_um_Kieckenwama_Traffic_LIGHT_FSM (Traffic Light FSM) tt_um_KimLuu02_WashingMachine_FSM (WashingMachine_FSM) tt_um_PaulineKreis_PWM_Analyser (PWM-Analyser) tt_um_PWM (PWM Generator) tt_um_wokwi_466666882406199297 (Simple Sprinkler) tt_um_rebeccargb_universal_decoder (Universal Binary to Segment Decoder) tt_um_rebeccargb_hardware_utf8 (Hardware UTF Encoder/Decoder) tt_um_spi_master (SPI Master Slave Communication) tt_um_likitha_trng (Secure TRNG Entropy Generator) tt_um_wnn (8-bit WNN Pattern Recognizer) tt_um_raksha (Raksha) tt_um_uart_soc (UART_SOC) tt_um_ecdsa_verify (ECDSA Verification) tt_um_ecc_processor (ECC Processor) tt_um_fast_auth (Fast Authentication Accelerator) tt_um_karthik_trng (TRNG using Ring Oscillator) tt_um_push (Secure V2X Mini Demonstrator) tt_um_santosh_aes_sbox (AES S-Box Accelerator) tt_um_hardware_anomaly_detection (Hardware Anomaly Detection) tt_um_multi_protocol (Multi-Protocol Communication Controller) tt_um_pqc_ntt_butterfly (PQC NTT Butterfly Core) tt_um_cambridge_nlfsr (Programmable Chaotic NLFSR) tt_um_4b_accumulator_cpu (4 bit Accumulator CPU) tt_um_spi_slave (SPI Slave with 8-Register File) tt_um_geeta_doddamani_lfsr (4-bit Maximum-Length LFSR) tt_um_ecc_accelerator (ECC Scalar Accelerator) tt_um_egurapha_chacha20 (ChaCha20) tt_um_configurable_pwm (Configurable PWM Generator) tt_um_Arctic0 (Arctic0 16-bit CPU) tt_um_comp8 (8-bit Comparator) tt_um_pwm_cit (Configurable 8-bit PWM Generator) tt_um_rameshwar_door_lock (Digital Door Lock) tt_um_sandy_venky (8-bit LFSR Circuit) tt_um_ljhahne_pong (Pong) tt_um_v2x_warning (V2X Collision Warning) tt_um_ecc_scalar_mult (ECC Scalar Multiplication) tt_um_fhw_appel_spiPWMio (spiPWMio) tt_um_arrakeen_spsram_direct_sramrules (TT-Arrakeen-SPSRAM-direct-sramrules) tt_um_arrakeen_spsram_direct_5v (TT-Arrakeen-SPSRAM-direct-5V) tt_um_LukeSilva_cartrip (Car Trip) tt_um_coffeepot (100Mpbs 3 port Ethernet switch) tt_um_emiliopeju_lightscan (Lightscan) tt_um_Alanduan21_triad01_top (triad01) tt_um_lif_snn (4-Neuron LIF Spiking Neural Network) tt_um_smerity_mandelbrot (Smerity-Mandelbrot) tt_um_elvtide01_7SegmentDice (7SegmentDice) tt_um_elemental_harmony (Elemental Harmony Game) tt_um_pattern_gen (Programmable Waveform and PWM Generator) tt_um_antimatter15_pdm_vad (PDM Voice Activity Detector) tt_um_layla_spike_detector (Neural Spike Detector) tt_um_detronyx_arith_lab (Detronyx Arithmetic Lab Tile) tt_um_hasheddan_nni (Nearest Neighbor Interpolation) tt_um_brisq (BRISQ) tt_um_santhosh_spike_codec_gf (Neuromorphic Spike Codec (GF180)) tt_um_santhosh_aer_router_gf (Asynchronous-AER Spike Router (4-phase REQ/ACK, 16-entry routing table, GF180)) tt_um_santhosh_snn_wta_gf (Spiking Neural Network WTA Inference Engine (GF180)) tt_um_santhosh_cim_bist_gf (CIM Controller with BIST and Fault Map (GF180)) tt_um_santhosh_neuro_puf_gf (Neuromorphic PUF (distinct-tap LFSR arbiter + memristor XOR, GF180)) tt_um_detronyx_uart_trace_exerciser (Detronyx UART Trace Exerciser) tt_um_ro_puf (Tiny RIng Oscillator PUF) tt_um_franretfie_top (Quadrature sine generator) tt_um_cherny_xor_8bi (XORing given bits) tt_um_mealycpp_ascon_sdmc_uart (ASCON Integrated Crypto Processor) tt_um_reflex_s4 (AER Reflex Chip - MCP2515 CAN gateway) tt_um_polytrig_core (PolyTrig Digital Waveform Synthesis Core) tt_um_waferspace_vga_screensaver (Wafer.space Logo VGA Screensaver) tt_um_2048_vga_game (2048 sliding tile puzzle game (VGA)) tt_um_urish_simon (Simon Says memory game) Available