
This project implements a scan-based procedural graphics generator that produces an 8-bit grayscale pixel stream using arithmetic and bitwise logic. The design behaves like a simplified fragment shader pipeline, where each pixel is computed on-the-fly from its current position rather than being stored in a framebuffer.
Internally, the system contains a raster scan generator (x/y counters) that continuously iterates over a virtual 256×256 image grid. For each (x, y) coordinate, a mode-selectable combinational shader core computes the output pixel value using different mathematical operations such as gradients, distance-based lighting, and XOR-based procedural noise.
A small temporal counter is optionally used to introduce animation in some modes, and a final output register ensures stable pixel output timing. Optional control signals allow the output to be inverted or animation to be frozen.
Overall, this design functions as a streaming procedural fragment processor without framebuffers or external memory.
The design is tested using a cocotb-based Python testbench that reconstructs full images from the continuous pixel output stream.
The testbench:
This allows verification of:
No external hardware is required. The design operates entirely in digital logic and produces a continuous pixel stream suitable for simulation and FPGA/ASIC integration.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | GFX_MODE_0 | PIXEL_OUT_0 | |
| 1 | GFX_MODE_1 | PIXEL_OUT_1 | |
| 2 | FREEZE_ANIMATION | PIXEL_OUT_2 | |
| 3 | INVERT_COLORS | PIXEL_OUT_3 | |
| 4 | PIXEL_OUT_4 | ||
| 5 | PIXEL_OUT_5 | ||
| 6 | PIXEL_OUT_6 | ||
| 7 | PIXEL_OUT_7 |