
This project implements a configurable analog clock generation unit on the Sky130 1.8V process. A voltage-controlled MUX (VCMUX) selects between three ring oscillator circuits — 3-stage, 5-stage, and 7-stage — based on the DC voltage applied to ua[1]. The VCMUX has eight 200mV thresholds across the 0–1.8V range. The selected oscillator's output appears on ua[0].
Additional test structures include T flip-flop frequency dividers connected to the 5- and 7-stage oscillators, a capacitor-loaded 5-stage oscillator, and a resistor-ladder voltage reference (bandgap reference divider).
Test 0 — Is the system alive?
Apply 1.8V to ua[1]. Confirm ua[0] shows approximately 200mV (resistor divider output).
Test 1 — Switching thresholds
Apply DC voltage to ua[1] from 0–1.8V in steps. Observe ua[0] switching between oscillation frequencies or a DC level. Expected thresholds:
Test 2 — Oscillator characterization
For each threshold range, record frequency, amplitude (Vpp), and DC offset using an oscilloscope.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | |||
| 1 | |||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |
ua | PCB Pin | Internal index | Description |
|---|---|---|---|
| 0 | B4 | 10 | Analog output |
| 1 | B5 | 11 | Analog input voltage selector |