719 Systolic VGA Visualizer
719 : Systolic VGA Visualizer
- Author: siriboi
- Description: 4x4 ternary systolic-array demo with 640x480 VGA output. The array result matrix is rendered directly as a 4x4 fullscreen heatmap.
- GitHub repository
- Open in 3D viewer
- Open in VGA Playground
- Clock: 25000000 Hz
How it works
This design is a Tiny Tapeout graphics demo built around a small 4x4 ternary systolic array and a VGA generator.
Main blocks:
- A 4x4 systolic array made of small multiply-accumulate processing elements.
- A tiny control path that feeds hardcoded matrix rows and columns into the array.
- A VGA timing generator for 640x480 @ 60 Hz.
- Direct rendering of the 16 output values as a fullscreen 4x4 heatmap.
The array computes one of several tiny matrix demos selected by ui_in[1:0]. Positive outputs are shown in green, negative outputs in red, and zero outputs in blue. VGA output is exposed on the standard Tiny Tapeout PMOD pin mapping.
How to test
Run the reduced RTL checks:
iverilog -g2012 -Isrc -s tt_um_rv32_vga src/tt_um_rv32_vga.v src/vga_sync.v src/systolic_array.v src/pe.v
verilator --lint-only -Wall src/tt_um_rv32_vga.v src/vga_sync.v src/systolic_array.v src/pe.v
The cocotb tests are intended to check:
- VGA sync pulse timing
- Mode 0 systolic-array output values
- Mode-switch recomputation behavior
External hardware
No external hardware is required beyond the VGA PMOD connection.
Current user input usage:
ui_in[0]: demo select bit 0ui_in[1]: demo select bit 1
All uio pins are unused in the current design.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | Demo select bit 0 | VGA R1 | |
| 1 | Demo select bit 1 | VGA G1 | |
| 2 | Unused | VGA B1 | |
| 3 | Unused | VGA VSYNC | |
| 4 | Unused | VGA R0 | |
| 5 | Unused | VGA G0 | |
| 6 | Unused | VGA B0 | |
| 7 | Unused | VGA HSYNC |