
This project implements a simple 8-bit Arithmetic Logic Unit (ALU). The ALU supports arithmetic, logical, and shift operations on two 8-bit operands.
The design contains two internal registers:
Operands are loaded into these registers through the ui[7:0] data bus.
Control signals are provided through the bidirectional pins (uio).
These signals determine when operands are loaded and which operation is executed.
ui[7:0] using the LOAD_A control signal.ui[7:0] using the LOAD_B control signal.EXECUTE signal.uo[7:0].| Opcode | Operation |
|---|---|
| 000 | ADD (A + B) |
| 001 | SUB (A − B) |
| 010 | AND |
| 011 | OR |
| 100 | XOR |
| 101 | SHIFT LEFT |
| 110 | SHIFT RIGHT |
| 111 | COMPARE (A == B) |
Two status flags are provided:
uio[6]) – set when the result is zerouio[7]) – set when arithmetic generates a carry| Pin | Description |
|---|---|
| ui[7:0] | 8-bit data input bus |
| Pin | Function |
|---|---|
| uio[0] | LOAD_A |
| uio[1] | LOAD_B |
| uio[2] | EXECUTE |
| uio[3] | OPCODE bit 0 |
| uio[4] | OPCODE bit 1 |
| uio[5] | OPCODE bit 2 |
| Pin | Description |
|---|---|
| uo[7:0] | ALU result |
| Pin | Description |
|---|---|
| uio[6] | ZERO flag |
| uio[7] | CARRY flag |
Example: perform 7 + 5
ui = 7LOAD_A = 1ui = 5LOAD_B = 1000 (ADD)EXECUTE = 1The output uo[7:0] should show:
12
The ZERO flag will be 0 and the CARRY flag will be 0.
No external hardware is required.
The design can be tested using:
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | DATA0 | RESULT0 | LOAD_A |
| 1 | DATA1 | RESULT1 | LOAD_B |
| 2 | DATA2 | RESULT2 | EXECUTE |
| 3 | DATA3 | RESULT3 | OPCODE0 |
| 4 | DATA4 | RESULT4 | OPCODE1 |
| 5 | DATA5 | RESULT5 | OPCODE2 |
| 6 | DATA6 | RESULT6 | ZERO_FLAG |
| 7 | DATA7 | RESULT7 | CARRY_FLAG |