706 INTERCAL ALU

706 : INTERCAL ALU

Design render

How it works

As an educational project, it is inevitable that Tiny Tapeout would attract various pedagogical examples of common logic circuits, such as ALUs. While ALUs for common operations such as addition, subtraction, and binary bitwise logic are surprisingly common, it is much rarer to encounter one that can calculate the five operations of the INTERCAL programming language. Due to either the cost-prohibitive nature of Warmenhovian logic gates or general lack of interest, such a feat has never been performed until now. With chip production finally within reach of the average person, all it takes is one person who has more dollars than sense to design the fabled INTERCAL ALU (Arrhythmic Logic Unit).

The pin assignments for this design are roughly as follows. The /OE (output enable) and /WE (write enable) signals are active low, so should be set HIGH by default.

# Dedicated Input Dedicated Output Bidirectional I/O
0 A0 (address) D0 (output only) D0 (input and output only)
1 A1 (address) D1 (output only) D1 (input and output only)
2 S0 (selector) D2 (output only) D2 (input and output only)
3 S1 (selector) D3 (output only) D3 (input and output only)
4 S2 (selector) D4 (output only) D4 (input and output only)
5 S3 (selector) D5 (output only) D5 (input and output only)
6 /OE (output enable) D6 (output only) D6 (input and output only)
7 /WE (write enable) D7 (output only) D7 (input and output only)

This ALU has two 32-bit registers, B and A (in no particular order). (These may also be thought of as four 16-bit registers, AL, AH, BL, and BH.) To write a byte to a register, set A0 and A1 to the byte address, set S0 LOW for the A register or HIGH for the B register, set S1 through S3 LOW, set the bidirectional I/O pins to the byte value, set /WE LOW, then set /WE HIGH again. (Do not set S1 through S3 HIGH when writing, or else something unpredictable will happen, most likely nothing.)

To read a register or result, set A0 and A1 to the byte address, set S0 through S3 to the desired operation, set /OE LOW, read the byte value from the bidirectional I/O pins, then set /OE HIGH. Results can also be read from the dedicated outputs; the dedicated outputs are not affected by the /OE signal, as they do not need to care about your feelings.

The operations supported are listed below. An attempt was made to make it understandable.

Operations 0 and 1 simply return the current value of the A or B register, respectively. This corresponds with the values of S0 through S3 used in write mode. This is not unintentional. This might also explain why S1 through S3 must be LOW in write mode.

Operations 2 through 7 correspond to INTERCAL's unary AND, unary OR, and unary XOR operators, represented by ampersand (&), book (V), and what (?), respectively. From the INTERCAL manual:

<blockquote> These operators perform their respective logical operations on all pairs of adjacent bits, the result from the first and last bits going into the first bit of the result. The effect is that of rotating the operand one place to the right and ANDing, ORing, or XORing with its initial value. Thus, <code>#&77</code> (binary = 1001101) is binary 0000000000000100 = 4, <code>#V77</code> is binary 1000000001101111 = 32879, and <code>#?77</code> is binary 1000000001101011 = 32875. </blockquote>

Operations 2, 4, and 6 work on the 16-bit halves of the A register independently, while operations 3, 5, and 7 work on the 32-bit whole of the A register.

Operations 8 and 9 correspond to INTERCAL's interleave (also called mingle) operator, represented by big money ($). From the INTERCAL manual:

<blockquote> The interleave operator takes two 16-bit values and produces a 32-bit result by alternating the bits of the operands. Thus, <code>#65535$#0</code> has the 32-bit binary form 101010....10 or 2863311530 decimal, while <code>#0$#65535</code> = 0101....01 binary = 1431655765 decimal, and <code>#255$#255</code> is equivalent to <code>#65535</code>. </blockquote>

Operation 8 returns the interleave of the lower halves of A and B, while operation 9 returns the interleave of the upper halves of A and B. (Should the chip fabrication process allow for it, operation 8½ will, of course, return the interleave of the middle halves of A and B.)

Operations 10 and 11 correspond to INTERCAL's select operator, represented by sqiggle (~). From the INTERCAL manual:

<blockquote> The select operator takes from the first operand whichever bits correspond to 1's in the second operand, and packs these bits to the right in the result. Both operands are automatically padded on the left with zeros. […] For example, <code>#179~#201</code> (binary value 10110011~11001001) selects from the first argument the 8th, 7th, 4th, and 1st from last bits, namely, 1001, which = 9. But <code>#201~#179</code> selects from binary 11001001 the 8th, 6th, 5th, 2nd, and 1st from last bits, giving 10001 = 17. <code>#179~#179</code> has the value 31, while <code>#201~#201</code> has the value 15. </blockquote>

To help understand the select operator, the INTERCAL manual also provides a helpful circuitous diagram.

Use of operations 12 and above is not recommended, unless undefined behavior is required.

How to test

The following example calculations found in the INTERCAL manual should be particularly illuminating.

S A B F
MINGLE16L (8) 0 256 65536
MINGLE16L (8) 65535 0 2863311530
MINGLE16L (8) 0 65535 1431655765
MINGLE16L (8) 255 255 65535
SELECT16 (10) 51 21 5 *
SELECT16 (10) 179 201 9
SELECT16 (10) 201 179 17
SELECT16 (10) 179 179 31
SELECT16 (10) 201 201 15
AND16 (2) 77 4
OR16 (4) 77 32879
XOR16 (6) 77 32875

These test cases are included in the (unfortunately Python and not INTERCAL) test.py file. As these are likely more INTERCAL operations than any sensible person will ever perform, they should be sufficient for testing purposes. However, for curiosity's sake, an extensive set of additional test cases have also been included.

* Not found in the INTERCAL manual.

External hardware

The ALU may be used without external hardware, although seeing the output values may present a challenge. Instead, it is recommended to use a microcontroller of some sort to drive the inputs and read the outputs, as microcontrollers are designed to do. The implementation of the rest of the INTERCAL language is left as an exercise for the reader.

Further reading

The INTERCAL Programming Language Revised Reference Manual by Donald R. Woods and James M. Lyon with revisions by Louis Howell and Eric S. Raymond (can recommend highly enough)

IO

#InputOutputBidirectional
0A0 (address)D0D0
1A1 (address)D1D1
2S0 (selector)D2D2
3S1 (selector)D3D3
4S2 (selector)D4D4
5S3 (selector)D5D5
6/OE (output enable)D6D6
7/WE (write enable)D7D7

Chip location

Controller Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Analog Mux Mux Mux Mux Mux Mux Mux Mux Mux Mux Analog Mux Mux Mux Mux Analog Mux Mux Mux Mux Mux Mux tt_um_chip_rom (Chip ROM) tt_um_factory_test (Tiny Tapeout Factory Test) tt_um_oscillating_bones (Oscillating Bones) tt_um_tetrahedral_oscillator (Tetrahedral Oscillator) tt_um_urish_simon (Simon Says memory game) tt_um_c4m_spsram_direct (TTSKY-SPSRAM-direct) tt_um_bgr (sky130 Bandgap Reference) tt_um_floating_bulk_test_2 (Floating-bulk-test-2) tt_um_sker (Bomberman) tt_um_pzhu2 (Hardware Triangle Rasterizer with VGA Output) tt_um_nlanderso_morse_code (Morse Code Translator) tt_um_peterhan_ReactionGame (Reaction Time Game) tt_um_minmanrox_drone (Drone Flight Controller) tt_um_tiny3d_kevinqian11 (Tiny3D) tt_um_abhinavputhran_raycast (raycaster) tt_um_sillylad_top (Tiny Rainbow Snake Game) tt_um_akim_tinydma (TinyDMA-2C) tt_um_jenny82121027_axi4lite (AXI4-Lite Slave Register Demo) tt_um_Edward2005lol_Slot_Machine_Top (Slot Machine) tt_um_amin_hong_ooo_cpu (tiny OoO CPU) tt_um_flappy_vga_Akul18 (Flappy VGA) tt_um_vidishac2004_calc (Keypad Calculator) tt_um_eric_lcc (Tiny_Tapeout_Launch_Controller) tt_um_rwnt_vgatest (Intro_VGA_Playground) tt_um_gurtej_randhawa1_pulsemon8 (PulseMon8) tt_um_28add11_latchup (latchup2026-28add11) tt_um_noah_azz_demo (My First TT Demo) tt_um_llhtimlam_movingscreen (movingscreen) tt_um_harveywong85_harveywilly (harveywilly) tt_um_theandelope_checkers (Checkers) tt_um_rajum_iterativeMAC (Iterative MAC LATCHUP2026) tt_um_calebulboaca_calebcheckers (Caleb's Checkers) tt_um_vga_yusefkarim (ttsky-verilog-yk) tt_um_lfearn_latchup (Latch Up Tiny Tapeout) tt_um_ww_charlieplex (7x8 Charlieplex Array Controller) tt_um_zlj8800_tiny_tapeout_v2 (Chipping Away to Learn about The Chips) tt_um_ocpu (OCPU) tt_um_aelobo (TinyPomodoro) tt_um_jasonbrave_terre (Terre VGA) tt_um_mosbius (mini mosbius) tt_um_fabulous_sky_26b (Tiny FABulous FPGA) tt_um_cycho (Mini Memory Controller) tt_um_erika24 (TinyFarm) tt_um_wokwi_463101366305871873 (Tiny Laura L) tt_um_pcs_link_lite (PCS Lite: Asynchronous 8b10b SerDes) tt_um_sienahlee (18244-s26-tiny-nn) tt_um_basic8 (Basic8 CPU) tt_um_basic_na (basic_national_anthem_buzzer) tt_um_datiuemm (IEEE MBIST & ECC for RAM 8x32) tt_um_CFG_WDT (Configurable WDT) tt_um_top (IEEE_henon) tt_um_fidel_makatia_digital_tapeout (8-bit Accumulator CPU SoC) tt_um_garage_project (IEEE_UPP_Garage unit control) tt_um_wokwi_462595774777167873 (Bypass Universal) tt_um_pwm_4ch (IEEE Multi-Channel PWM Controller ) tt_um_amarjay (mini_cpu) tt_um_blackjack (ttsky-blackjack) tt_um_bartu_kripto (Tiny Crypto Core) tt_um_umitanik_matmul3x3 (3x3 Serial Matrix Multiplier (4-bit)) tt_um_tnt_mosbius (tnt's variant of SKY130 mini-MOSbius) tt_um_rule30_vga (IEEE Rule 30 Cellular Automaton VGA Display) tt_um_authQV (authQV RISC-V CPU) tt_um_nn_3x3 (3x3 Hardware Neural Network (Programmable TPU)) tt_um_top_module_16_mips (16-bit MIPS Single Cycle Processor) tt_um_auth_dmac (AUTh DMA Controller) tt_um_puf (IEEE Ring Oscillator PUF) tt_um_jacob_kebaso_4bit_cpu (Nibble - 4-bit CPU) tt_um_IEEE_perceptron (1-bit Perceptron - Hardware Neuron) tt_um_wokwi_458569964697822209 (Full Adder: Binary Addition Circuit) tt_um_yfoong86_chasey (Chasey) tt_um_dsp_top (Configurable 8-bit Streaming DSP Core) tt_um_processor_top (TinyCrypto-8) tt_um_pro_clk (Programmable Clock Generator) tt_um_wokwi_458951258752539649 (a tour-in the haunted house) tt_um_vga (IEEE Multi-Mode Procedural VGA Graphics Engine) tt_um_happy_birthday (IEEE Happy Birthday Detector) tt_um_galois_lfsr16 (16 bit Galois LFSR based Random number generator-IEEE) tt_um_cordic_ieee (Cordic-based Math processor-IEEE) tt_um_wokwi_462089659615737857 (Mines live or die) tt_um_arfanghani_design2_top (Multi-Mode Sensor Signal Processor) tt_um_arfanghani_design3_top (Heat Stress Alert ASIC) tt_um_arfanghani_design1_top (Water Quality Classifier Core) tt_um_zed_analog (Analog design) tt_um_gen_onda (DDS Waveform Generator - IEEE) tt_um_Richard_Tarqui_contador_uart_simple (UART - Controlled Frecuency Meter & Timer - IEEE) tt_um_iporre_rm121 (IEEE PONG IPORRE VGA) tt_um_digitalclock (Digital Clock!) tt_um_wokwi_462089398612533249 (Sunblock Holiday) tt_um_wokwi_458477197787547649 (FULL SUBTRACTOR) tt_um_wokwi_462165147286899713 (PSI Open IC 2026) tt_um_RaphRaphyRofl_VerilogIEEEBounce (IEEE Letters Screensaver) tt_um_leongamboa_OpenSilicon_SubmissionChapterLogo (Open Silicon 2026: SKY26a Submission - Chapter Logo) tt_um_SollysLe_mac_8bits (8-bit Multiply-Accumulate (MAC) with 2-Cycle Serial Interface) tt_um_AlephNaNsea_decentvgachipIEEEIESIPSPH (Galvantronix, DLSU, and me!) tt_um_IEEE_OpenSilicon_SubmissionCredits (Open Silicon 2026: SKY26a Submission - Chapter Logo) tt_um_Mitchell_s_Approximation_based_EML (IEEE Mitchell-s_Approximation_based_EML) tt_um_tiny_8bit_cpu (IEEE Tiny 8bit CPU) tt_um_dco (Digitally Controlled Oscillator) tt_um_thunder (Ford Thunderbird Rearlights Controller - IEEE OpenSilicon Bootcamp) tt_um_tiny8_risclike (IEEE_CPU with SPI program load and internal execution) tt_um_coffee_chip (IEEEcoffee_chip) tt_um_vga_glyph_mode_clone (Philippine IC Design Boot Camp 2026!) tt_um_alu7b (IEEE 7-bit ALU - Serial Input / Parallel Output) tt_um_AlephNaNsea_space_time_waves_and_filaments (Space-Time Waves and Filaments) tt_um_BFD100_Logic (BDF1000 Line folower) tt_um_Floppy_LIGHT (Floppy LIGHT) tt_um_okforth_ieee (SUBLEQ CPU IEEE) tt_um_magnetofield_ieee (Hackerspace logo IEEE) tt_um_krv8_ieee (A simple 8-bit RISC-V style CPU) tt_um_tile_growth_simulator_NoahW (Tile Growth Simulator) tt_um_prog_clk_router (Programmable Clock Router (IEEE)) tt_um_snk_smart_io_hub (UART Smart I/O Hub) tt_um_rom_vga_screensaver (VGA Screensaver with embedded bitmap ROM) tt_um_eml_gate (EML Serial Coprocessor) tt_um_Nay0805_detector_de_patrones_generados_aleatoreamente (tt_um_Nay0805_detector_de_patrones_generados_aleatoreamente) tt_um_DlynchR_spi_display (tt_um_DlynchR_spi_display) tt_um_scisneros29_BCR (tt_um_scisneros29_BCR) tt_um_sqrt8_ieee (A simple 8-bit square root calculator.) tt_um_ieee_opensilicon_bootcamp (Guess the Number Game - IEEE OpenSilicon Bootcamp) tt_um_wokwi_461639934990157825 (4 bit unlock (IEEE)) tt_um_wokwi_461620354455920641 (4-Bit High-Security Password System (IEEE)) tt_um_KK_VGA01 (KK Zuzel Motocross IEEE) tt_um_wokwi_461622504612675585 (Tiny Tapeout : Lock system v2 (IEEE)) tt_um_riscv_alu (rv32i RISC-V ALU) tt_um_the_siliconimist_chip1 (The Siliconimist Chip1) tt_um_william_pll (Smartcard PLL Clock Generator) tt_um_william_adc8 (Sigma-Delta Bitstream ADC (8-bit)) tt_um_wlmoi_bcd_to_7segment (TTSKY26A BCD to 7-Segment Decoder) tt_um_BillNace_SumItUp (SumItUp Hardware Thread (18-341)) tt_um_sandsim_Alden_G878 (SandSim) tt_um_dma_multi_channel (dma_multi_channel) tt_um_Halcy0nnnn_1 (IEEE_MMU_Cybertron_Logo) tt_um_8_bit_cpu (8-bit CPU) tt_um_morse_code (Translator) tt_um_unified_error_detection (8-Bit Error Detection Engine) tt_um_sobel (Streaming Sobel Edge Detection Accelerator) tt_um_NUPlace2 (VAK FSM) tt_um_youweiterrylu (DMA) tt_um_joo111emad_BGR (Analog BGR) tt_um_izh_neuron (SKY130 Spiking Neuron) tt_um_izh_neuron_4pins (SKY130 Spiking Neuron) tt_um_pmendoza_ieee_tinyscan (Tiny SCAN chain tester) tt_um_rajkamal_analog (IEEE Multi-Stage Configurable Ring Oscillator) tt_um_isalopez9_memory_game (Simon Memory Game Chip) tt_um_usp_didactic ((IEEE) USP OpenSilicio Didactic Testchip) tt_um_bn_lif_evan (Bernoulli Stochastic Multiplier + LIF Neuron) tt_um_advun (tinyWorkshop) tt_um_wokwi_460983138943099905 (Trial IB) tt_um_pfw_tpu (2x2 Systolic Array TPU) tt_um_riscv_gpu (4x4 BitNet b1.58 Matrix Multiply Accelerator) tt_um_tt08_axis_fifo_fwft_bkenololo (IEEE 8-bit AXI4-Stream FWFT FIFO) tt_um_analog_ota_v3_IEEE (TTSKY26a_Miller_OTA(IEEE)) tt_um_quadpulse_pwm (QuadPulse — 4-Channel Servo/Motor PWM ASIC) tt_um_advaittej_stopwatch (V-SPACE Demo: Command & Control Chronograph) tt_um_snn_afib_detector (SNN AFib Detector — Spiking Reservoir Computing Core) tt_um_Halcy0nnnn (IEEE_MMU_Cybertron_Logo) tt_um_baby_cpu (Baby CPU) tt_um_wokwi_462285560117329921 (BCD ID Wowki) tt_um_LAT (Automation Laboratory Logo with author Image) tt_um_dean_foulds_ai_accelerator (Systolic Binary Neural Network Accelerator) tt_um_kazan_rqpu (tt_um_kazan_rqpu) tt_um_ultrasage_danz (IEEE Open-Silicon 2026 x NITHUB: Soil Moisture Irrigation Controller) tt_um_traffic_ctrl (IEEE Open-Silicon 2026: Adaptive Traffic Light Controller with Emergency Override) tt_um_lpf_ieee (Moving average Digital Low pass filter (IEEE open silicon)) tt_um_array_mult_vga (4x4 Array Multiplier with VGA Visualization) tt_um_bfloat16 (IEEE bfloat16_accelerator) tt_um_silicon_art_vga_screensaver (VGA Screensaver with Silicon Art ROM) tt_um_seapanda0 (DSP_FIR) tt_um_datdt_charizard (IEEE VGA Charizard Flamethrower) tt_um_ocd_charlieplex (Charlieplex array controller) tt_um_bytex64_wave_hi (wave_hi) tt_um_STDCELL_LDO (STDCELL_LDO) tt_um_devil_nyancat (Devil Nyan Cat VGA) tt_um_ieee_pwd (PWM Generator) tt_um_petros (TTNN: Pre-trained BNN for 8x8 MNIST) tt_um_Medidor_Jitter (Jitter Metrics & Pulse Analyzer) tt_um_CNN4IC_sky (CNN4IC — Convolutional Neural Network (CNN) for Image Classification on Chip (IEEE)) tt_um_Madd_CS_Ring_Osc (CSRO with 8-bit DAC) tt_um_reaction_game (Reaction game on Simon Says board) tt_um_load_priority_controller (IEEE Open-Silicon 2026: Load Priority Controller) tt_um_ctw_ldo (LDO Regulator Skywater 130nm) tt_um_c4m_legacyspsram_direct (TTSKY-SPSRAM-legacy-direct) tt_um_tpu (Mini TPU v2) tt_um_rcyaon (bandgap-ptat) tt_um_5tOTA (Operational Transconductance Amplifier) tt_um_wokwi_461554799001985025 (inec_voting) tt_um_systolic_array (Custom 3 by 3 Systolic Array) tt_um_chronoINAAL (Digital Stopwatch with LAP mode) tt_um_pree (UART_Analog_IC) tt_um_thorsten_shiftregister (Shiftregister Challenge 40 Bit) tt_um_hamming74 (Hamming(7,4) Encoder/Decoder) tt_um_prathiba_finite_sbox (Finite Field AES S-box) tt_um_maw_game (MAW Bird Shooter VGA Game) tt_um_vga_ascii (ascii_typewriter) tt_um_lstm_wakeword (TTSKY26A Neural Network - LSTM Wake Word Detector) tt_um_bad_apple (test) tt_um_riscv_branch (rv32i RISC-V Branch Condition Unit) tt_um_alu8bit (8-bit Tiny ALU) tt_um_chaotic_rng (C0haotic RNG) tt_um_ik_0_ptat_bgr (Pseudo-PTAT cell based bandgap reference) tt_um_er_ring_osc (Simple Ring Oscillator) tt_um_wokwi_462290658621740033 (IEEE IC Bootcamp Khalifa University) tt_um_ross_systolic (2x2 Systolic Array Matrix Multiplier) tt_um_27jorge05_crc_fifo (CRC_FIFO: CRC-32 Engine with 8-Byte FIFO and VGA Display) tt_um_jonathanbytes_alu8_serial (ALU8 Serial (IEEE)) tt_um_vmm_bnn (Nano-Bnn-Accelerator) tt_um_Onchip_TrafficLight (Onchip-UIS Traffic Light) tt_um_rebeccargb_universal_decoder (Universal Binary to Segment Decoder) tt_um_db_PWM (Onchip-UIS PWM Generator ) tt_um_ccollatz_SO (Onchip-UIS Collatz Conjecture) tt_um_rebeccargb_hardware_utf8 (Hardware UTF Encoder/Decoder) tt_um_rebeccargb_intercal_alu (INTERCAL ALU) tt_um_rebeccargb_vga_pride (VGA Pride) tt_um_wokwi_462349004652630017 (IEEE Logic Locked Reversible 2-Bit ALU) tt_um_andriansyah_capless_ldo (capless LDO regulator with 51.1dB PSRR at 100kHz) tt_um_ramp_adc (ttsky26b-ramp-adc) tt_um_alu_7bits (ALU 7 Bits) tt_um_ALU_Porca (Onchip-UIS 8-bit ALU with Status Flags) tt_um_oreoluwa_water_level (IEEE Open-silicon 2026 x NITHUB: Fluid Level Detector and Controller) tt_um_wokwi_464171439964087297 (First Silicon) tt_um_wokwi_464173578877001729 (Tiny Tapeout Template - PJ v2) tt_um_krisjdev_artwork (Silicon Artwork) tt_um_wokwi_464171399090591745 (tiny-tapeout-2026-05-16) tt_um_wokwi_464176621517795329 (Tiny Tapeout Run1) tt_um_wokwi_464178664603376641 (Tiny Tapetest) tt_um_wokwi_464171361019935745 (Tiny Tapeout Template Copy) tt_um_wokwi_464177144942873601 (TinyTapeout_Hackaday_Daniel) tt_um_wokwi_464171521208810497 (Daniel's first chip (Tiny Tapeout)) tt_um_wokwi_464171464939073537 (Claire's first Wokwi design) tt_um_wokwi_464176181065476097 (8-bit counter) tt_um_hackin7_coprocessor (AoC Hardcaml Coprocessor) tt_um_wokwi_464171453853527041 (Tiny Tapeout Hackaday 2026) tt_um_wokwi_464171864719209473 (Everton - Tiny Tapeout Workshop LC26) tt_um_ml_coprocessor (Kunal ML co-processor) tt_um_rahulbhagwat_brainamp_lna (brainamp-ac-coupled-lna) tt_um_Onchip_adder_NM (Onchip-UIS 4-bit Ripple Carry Adder) tt_um_wokwi_463557428446691329 (3Bit_yALU_IEEE_V2) tt_um_Onchip_Trimmed_BandGap (Onchip-UIS 3-bit Trimmed 1.2V BandGap) tt_um_ascon_cxof_chain (ASCON-CXOF128 Hash-Chain Accelerator) tt_um_Onchip_Freq_Divider_Dig (Onchip-UIS CLK Frequency Divider) tt_um_bleeptrack_cc2 (Recursive Rectangles) tt_um_enjimneering_spi_mem (SPI Memory Test) tt_um_voltrare (UART SPI ASCII Art) tt_um_enrico_glr (Secret Guessing Game) tt_um_gitragi_rng (Logic-Locked 5-Bit RNGy) tt_um_ece298A_analog_r4 (ECE298A analog tile) tt_um_trinity_nano (TRI-1 Phi — Trinity φ-anchor 1×1 Lucas POST + CLARA Gap-4) tt_um_ghtag_trinity_gf16 (TRI-1 Euler — Trinity e-engine 8×2 SUPER-CROWN + 10 CLARA Gaps) tt_um_lujji_ulogic_analyzer (ulogic_analyzer) tt_um_catalinlazar_adpll_125m_sky130 (127-stage Coarse-Tapped ADPLL) tt_um_vga_sharc_demo (SHaRC VGA Demo) tt_um_digit_serial_divider (IEEE | 24-Bit Serial Fixed-Point Binary Divider) tt_um_xeniarose_sbox (AES S-Box / PRESENT) tt_um_main_fsm_anbui_uci (Swarm Microrobot Drug Delivery FSM) tt_um_RO_aging (Onchip-UIS Ring Oscillators for Aging) tt_um_trinity_max_true (TRI-1 Gamma — MAX-TRUE NEUROMORPHIC FLAGSHIP 32-tile 8-column) tt_um_gray_sobel (tt_um_sobel_threshold) tt_um_c0d3d1_ldo (tt26b-Babies-First-LDO) tt_um_Bio_SSG_ (Bio-SSG) tt_um_nezumi_tech_adc_sq_compare (TT ADC SQ Compare) tt_um_c4m_spsram_direct_librelane (TTSKY-SPSRAM-direct-librelane) tt_um_tinycgra (tinyCGRA 2x2) tt_um_opensilicio_5g_rectifier (5 GHz RF-DC Rectifier) tt_um_sky_pll (SKY PLL test project) tt_um_rv32_vga (Systolic VGA Visualizer) tt_um_tron_game (TRON: Light Cycles game with VGA support (IEEE)) tt_um_wearlevel_controller (Hardware EEPROM Wear-Leveling Controller) tt_um_enjimneering_bss_uart (BSS UART) tt_um_wokwi_458489231265343489 (EDS workshop 4bit adder) tt_um_wokwi_464171612496799745 (Tiny Tapeout Exercise) tt_um_wokwi_464178459384432641 (Tiny Tapeout Template Copy) tt_um_leozqi_onetile (OneTile!) tt_um_d_4_array_multiplier (3020 Test Repo 4x4 Array Multiplier) tt_um_adithya_selvakumar_vco (4-Stage Differential Ring VCO) tt_um_snk_pwm_uart (PWM UART Controller) Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available