231 Bias Generator

231 : Bias Generator

Design render
  • Author: Rod Burt
  • Description: A test chip for a simple CMOS beta multiplier current source.
  • GitHub repository
  • Clock: 0 Hz

How it works

A test chip to evaluate mismatch of a simple CMOS beta multiplier 1uA current source. Eight identical cells are oriented in one direction and another eight cells are rotated 90 degrees for evaluation.

How to test

All current outputs (i_out) are wired together and brought out on ua[0]. Disable individual cells 0 -> 7 with ui[0] -> ui[7] and cells 8 -> 15 with uio[0] -> uio[7].

External hardware

None

IO

#InputOutputBidirectional
0disable 0disable 8
1disable 1disable 9
2disable 2disable 10
3disable 3disable 11
4disable 4disable 12
5disable 5disable 13
6disable 6disable 14
7disable 7disable 15

Analog pins

uaanalogDescription
01i out

Chip location

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