
This design is a small UART-driven ALU processor. It receives three bytes over UART (opcode, operand A, operand B), computes the result with an 8-bit ALU, and sends the result byte back over UART.
| Opcode | Name | Operation (8-bit) |
|---|---|---|
| 0x00 | NOP | 0 |
| 0x01 | ADD | A + B |
| 0x02 | SUB | A - B |
| 0x03 | AND | A & B |
| 0x04 | OR | A | B |
| 0x05 | XOR | A ^ B |
| 0x06 | SHL | A << B[2:0] |
| 0x07 | SHR | A >> B[2:0] |
0x01 0x14 0x1E for ADD 20 + 30).Example (hex): send 01 14 1E → expect 32 (50).
Simulation: The full test (make test-full) uses a synchronous UART sender in the testbench (uart_tb_sender.v) with overridden parameters (100 kHz clock, 4800 baud) so RX is driven with exact 16 cycles/bit on the same clock as the DUT.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | RX | ||
| 1 | TX | ||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |