974 SIC-1 8-bit SUBLEQ Single Instruction Computer

974 : SIC-1 8-bit SUBLEQ Single Instruction Computer

Design render

How it works

SIC-1 is an 8-bit Single Instruction computer. The only instruction it supports is SUBLEQ: Subtract and Branch if Less than or Equal to Zero. The instruction has three operands: A, B, and C. The instruction subtracts the value at address B from the value at address A and stores the result at address A. If the result is less than or equal to zero, the instruction jumps to address C. Otherwise, it proceeds to the next instruction.

Memory map

The SIC-1 computer has an address space of 256 bytes, and and 8-bit program counter. The first 253 bytes are used for the program memory, and the last 3 bytes are used for input, output, and for halting the computer:

Address Label Read Write
253 @IN ui pins Ignored
254 @OUT Returns 0 uo pins
255 @HALT Returns 0 Ignored

Setting the program counter to 253, 254, or 255 will halt the computer.

Each instruction is 3 bytes long, and the program counter is incremented by 3 after each instruction, except when a branch is taken.

For more information, check out the SIC-1 Assembly Language Reference.

Execution cycle

Each instruction takes two cycles to execute, regardless of whether a branch is taken or not. The execution of an instruction is divided into the following stages:

  1. a. Write result: writes the result of the previous instruction back to memory. b. Read instruction: reads A, B, and C from the memory at the address pointed to by the program counter (PC).
  2. Read data: Reads the values at addresses A and B and calculate the result of valA - valB. If the result is less than or equal to zero, set the PC to C. Otherwise, increment the PC by 3 to point to the next instruction.

The pseudocode for the execution cycle is as follows:

(1) result = valA - valB
    next_PC = result <= 0 ? C : PC + 3
    memory[A] <= result
    A <= memory[next_PC]
    B <= memory[next_PC+1]
    C <= memory[next_PC+2]
    PC <= next_PC
(2) valA <= memory[A]
    valB <= memory[B]

Where valA and valB are internal registers that hold the values read from memory at addresses A and B, respectively.

The <= symbol indicates a memory or register write operation, while the = symbol indicates a combinational assignment.

Control signals

The uio pins are used to load a program into the computer, and to control the computer:

uio pin Name Type Description
0 run input Start the computer
1 halted output Computer has halted
2 set_pc input Set the program counter to the value on ui pins
3 load_data input Load the value from the ui pins into the memory addressed by PC
4 out_strobe output Pulsed for one clock cycle when the computer writes to @OUT (uo pins)
5 dbg[0] input Debug select bit 0
6 dbg[1] input Debug select bit 1
7 dbg[2] input Debug select bit 2

Debug interface

The dbg pins are used to expose internal signals for debugging on the uo pins. When the dbg pins are set to 0, the uo pins will output the @OUT value. For other values of dbg, the uo pins will output the following signals:

dbg[2:0] Signal
0 None
1 PC
2 A
3 B
4 C
5 valA
6 result (valA - valB)
7 state (2 bits)

The state signal is a 2-bit value that represents the current state of the computer, corresponding to the execution cycle stages described above (1 and 2), and a 2-bit value of 0 when the computer is halted.

Programming the SIC-1

You can use the online SIC-1 app to compile and simulate your SIC-1 programs. Click on "Run game" and then "Apply for the job", close the "Electronic mail" popup. Paste the code and click on "Compile" (on the bottom left). You'll see the compiled code in the "Memory" window on the right, and will be able to step through the code.

To load a program and run a program, follow this sequence:

  1. Set the ui pins to 0 (target address)
  2. Pulse the the load_pc pin for a single clock cycle
  3. Set the ui pins to the value you want to load
  4. Pulse the load_data pin for a single clock cycle
  5. Repeat steps 3-4 until you have loaded the entire program
  6. Set the ui pins to the address you want to start at (usually 0)
  7. Pulse the set_pc pin for a single clock cycle
  8. Set the run pin to 1. The computer will start running the program, and the halted pin will go high when the program is done.

If you want to step through the program, you can pulse the run pin to advance one instruction at a time.

Reading the internal memory

You can read the internal memory of the SIC-1 while the program is halted. To do this, follow these steps:

  1. Set the run pin to 0 to halt the computer, and wait for the halted pin to go high.
  2. Set the ui pins to the address you want to read.
  3. Pulse the the load_pc pin for a single clock cycle.
  4. Set the dbg pins to 010 (binary for 2) to select the "A" debug signal.
  5. Read the value on the uo pins.

The value on the uo pins will be the value stored in the internal memory at the address you specified.

IO

#InputOutputBidirectional
0in[0]out[0]run
1in[1]out[1]halted
2in[2]out[2]set_pc
3in[3]out[3]load_data
4in[4]out[4]out_strobe
5in[5]out[5]dbg[0]
6in[6]out[6]dbg[1]
7in[7]out[7]dbg[2]

Chip location

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tt_um_wokwi_445163763917969409 (Tiny Tapeout Binary to 7SD) tt_um_wokwi_445172941748296705 (Anushka and Tina Wokwi) tt_um_wokwi_445163964149915649 (Tahmid and Sunny's First Wokwi Design) tt_um_verilog_meetup_template_project_example (Verilog Meetup Template Project Example) tt_um_brainfck_asic (Brainf*ck ASIC) tt_um_wokwi_446363834407809025 (RHYTHM LOOPER and RANDOMIZER 9000) tt_um_technology_characterization (SKY130 technology characterization) tt_um_mosbius (mini mosbius) tt_um_bouncing_squares (Bouncing squares) tt_um_PseudoSM_ASIC (PSM_asic) tt_um_enjimneering_tts_top (TinyTapeStation) tt_um_morse_it (MORSEASCII) tt_um_vga_projekt_ed_nkpng (vga_projekt_ed_nkpng) tt_um_uart_temp_sens (Uart and Temperature sensor) tt_um_ragnar_lucasnilsson954 (RagnarMegaRaknare) tt_um_react_test_saksh156 (React Chip) tt_um_mastermind (Mastermind) tt_um_synth_magmusson (hardcoded sequencer) tt_um_hammal_fir_filter (FIR Filter) tt_um_tinytone (tt-tinytone) tt_um_julke_gussinatorn2 (JulkeGussinatorn 2.0) tt_um_se_opamps (ttsky25_se_opamps) tt_um_unclegravity_7seg_counter (7-Segment Counter) tt_um_wokwi_445256658591419393 (Andrew chip design) tt_um_counter_isaharp (Counter) tt_um_wokwi_445254959452357633 (Anton's-Hardware-Hack) tt_um_wokwi_445256643197274113 (SignalSorter) tt_um_wokwi_445265826672030721 (The Adder) tt_um_wokwi_445175605912766465 (Tiny Tapeout Hradware Workshop Vaibhav) tt_um_fkd_xorshift (xorshift) tt_um_wokwi_445255035084055553 (Tiny Tapeouts Chip Design) tt_um_wokwi_445254913718704129 (Tiny Tapeout Test Gates) tt_um_wokwi_445254916601240577 (cirucuit) tt_um_wokwi_442988784492711937 (test) tt_um_rejunity_ym2413_ika_opll (YM2413 FM synthesis audio chip) tt_um_top_general (Dual-Channel PWM with SPI Control + Extra Test Logic) tt_um_proppy_megabytebeat (megabytebeat) tt_um_rom_vga_screensaver (VGA Screensaver with embedded bitmap ROM) tt_um_sky25a_nurirfansyah_nauta (Nauta OTA with digital trimming) tt_um_mattvenn_relax_osc (Relaxation oscillator) tt_um_pantelis300_nco (NCO) tt_um_ieeeuoftasic_simproc (SimProc (Simple Processor)) tt_um_rejunity_vga_playground (My (S)VGA Playground) tt_um_Onchip_VCOx2 (Onchip - Ring VCO 11 stages x2) tt_um_dlmiles_dffram32x8_2r1w (Tiny RAM DFF 2r1w) tt_um_Onchip_BandGap (OnChip - Bandgap Reference) tt_um_kianv_bare_metal (KianV RISC-V RV32E Baremetal SoC) tt_um_pommarkus_i2c_slave (I2C Slave) tt_um_MichaelBell_tinyQV (TinyQV Risc-V SoC) tt_um_reservoir (EZ Reservoir) tt_um_morse_w_serial (Morse Code Detector (With Serial RX)) tt_um_dyno (dyno-tt) tt_um_libokuohai_asap_cpu_v1 (ASAP CPU v1) tt_um_2048_vga_game (2048 sliding tile puzzle game (VGA)) tt_um_quick_cpu (4 hour CPU) tt_um_tv_b_gone_rom (TV-B-Gone-EU (ROM Macro variant)) tt_um_flappy_vga_cutout1 (Flappy VGA) tt_um_Sai222777 (XOR Stream Cipher) tt_um_ring_osc3 (Verilog Multistage Oscillator with Enable and Counter) Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available Available