548 Latched 4-bits adder
548 : Latched 4-bits adder
- Author: Adan Kvitschal
- Description: 4-bits added with lacthed output, sum result is updated every clock rising edge
- GitHub repository
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- View in Wokwi
- Clock: 1 Hz
How it works
The 4-bits added is built using 4 textbook "full adder with carry in and carry out" circuits. The first block carry input is tied to ground, but the carry out is available as an output.
The output of the circuit is latched using DSR flip-flops, so the result is updated on every clock rising edge. Also, you can reset the valur using the reset pin, which is tied to the flip-flops reset input.
How to test
Generate different 4-bits for A and B operands (see input pins) using the dip switch, wattch the resulting binary number correspondig to the sum of these numbers. If the resulting sum is greater than 15 (0xf), then there will be a carry bit that can also be considered the 5th bit of the result. PLease note that the carry out is not latched, so it will not be stored between clock cycles.
External hardware
This project uses only basic logic. The result can be verifies using LEDs.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | a[0] | s[0] | |
| 1 | a[1] | s[1] | |
| 2 | a[2] | s[2] | |
| 3 | a[3] | s[3] | |
| 4 | b[0] | cout | |
| 5 | b[1] | ||
| 6 | b[2] | ||
| 7 | b[3] |