301 Adaptive Leaky Integrate-and-Fire spiking neuron core for edge AI :: Quicker, easier and cheaper to make your own chip!

301 : Adaptive Leaky Integrate-and-Fire spiking neuron core for edge AI

Author: CUTM

Description: Hardware implementation of an adaptive leaky integrate-and-fire spiking neuron for edge AI

Clock: 50000000 Hz

This LSNN (Leaky Spike Neural Network) implementation features:

The design operates through several key mechanisms:

Membrane Dynamics:
- Integrates 8-bit input current
- Applies leaky decay of 1/4 per cycle
- Resets to 0 after spike
Adaptation Mechanism:
- Learning-enabled threshold adjustment (controlled by uio_in[0])
- Adaptation increases with each spike
- Gradual decay when not spiking
Output Monitoring:
- uo_out[7]: Refractory state indicator
- uo_out[6:0]: Current membrane potential
- uio_out[7]: Spike output
- uio_out[6:0]: Spike counter

Testing procedure:

Reset (rst_n = 0):
- Verify all state variables reset to 0
- Threshold should reset to base value (100)
Basic Operation:
- Apply input current through ui_in[7:0]
- Monitor membrane potential on uo_out[6:0]
- Observe spike generation on uio_out[7]
- Check refractory period indicator on uo_out[7]
Learning Mode:
- Set uio_in[0] to enable learning
- Verify threshold adaptation after spikes
- Monitor spike frequency changes
Performance Verification:
- Track spike count through uio_out[6:0]
- Verify proper threshold adjustment
- Test different input current levels

#	Input	Output	Bidirectional
0	Input current bit [0]	State variable bit [0]
1	Input current bit [1]	State variable bit [1]
2	Input current bit [2]	State variable bit [2]
3	Input current bit [3]	State variable bit [3]
4	Input current bit [4]	State variable bit [4]
5	Input current bit [5]	State variable bit [5]
6	Input current bit [6]	State variable bit [6]
7	Input current bit [7]	State variable bit [7]	Spike bit [7]

Input

Output

Bidirectional

Input current bit [0]

State variable bit [0]

Input current bit [1]

State variable bit [1]

Input current bit [2]

State variable bit [2]

Input current bit [3]

State variable bit [3]

Input current bit [4]

State variable bit [4]

Input current bit [5]

State variable bit [5]

Input current bit [6]

State variable bit [6]

Input current bit [7]

State variable bit [7]

Spike bit [7]

Chip location

301 Adaptive Leaky Integrate-and-Fire spiking neuron core for edge AI