This project implements a modified version of the Simon Says game. The design uses digital logic to control game flow and memory elements to store a pseudo-random sequence of colors. The system interfaces with external buttons and LEDs to allow human interaction and gameplay.
Upon powering up the chip:
Idle State
start
signal.Display State
Wait State
Check State
game_complete
signal will be 1
, indicating a win.game_complete
signal will be 0
, indicating a loss.End of Game
check_state
block. The user can press the reset button to begin a new round of Simon Says.8-bit Linear Feedback Shift Register (LFSR)
Color Encoder/Decoder
Game States
State Debug
uo_out[5]uo_out[4]
IDLE: 00 DISPLAY: 01 WAIT: 10 CHECK: 11
During IDLE state, LFSR takes seed and produces shifted outputs. The outputs are loaded into the 32bit memory 8 bits at a time. See LFSR_SEED, LFSR_out, MEM_OUT signals. <br>
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During Display the sequence in memory is decoded and asserts on the output lines. See uo[3:0]. signal. Note, for simulation, the delay between displayed colours is significantly reduced. When played by the user, each colour display holds for 500ms.<br>
<br>
During Wait and check, the user inputs are recorded and compared against the generated sequence. In this case, the sequence matches and thus game_complete goes to 1. See colour_val, colour_in signals, sequence_match, and game_complete signals.<br>
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STATES:
IDLE:
<br>
DISPLAY:
<br>
WAIT:
<br>
CHECK:
<br>
This testbench performs a smoke test and a full functional verification of the Simon Says system using stimulus vectors from a CSV file. It exercises the interaction between memory loading, display, wait, and check states, simulating user inputs and verifying the game logic. The test assumes a 10 MHz clock (50 ns half period).
Sequential simulation:
START
.IDLE
state to complete before loading the test sequence into memory.WAIT
state (en_WAIT).complete_WAIT
, complete_CHECK
).Success criteria:
WAIT
and CHECK
states for each test vector.sequences_match
flag correctly reflects whether the player’s sequence matches the stored sequence.Failure criteria:
CSV Contents:
<br>
| Seed | User Input | Expected Result |
Results:
<br>
CHECK
and set the game_complete
signal to 0, indicating a loss.DISPLAY
: Colour is displayed long enough (500ms) for users to understand and colour sequence is consistent between rounds.WAIT
: State ends only when all required colours are entered. (ex. in the 14-colour sequence, must wait until 14 colours are entered).CHECK
: Correct validation. (if the user enters a correct sequence, it should end the game and set game_complete
to 1, indicating a win.)IDLE
until Start is pressed. Verify using State debug signal.DISPLAY
. Verify using State debug signal.IDLE
, discarding current game state.
IDLE
, during IDLE
, DISPLAY
, WAIT
, CHECK
Component | Quantity | Notes |
---|---|---|
Push Buttons | 6 | Red, Blue, Green, Yellow, Start, Reset |
LEDs | 4 | One for each color, with pull-down resistors |
Raspberry Pi | 1 | Sends 8-bit seed to the chip and reads in a 2-bit State Debug Signal |
To match encoding the following outputs should be wired to these colour leds:
# | Input | Output | Bidirectional |
---|---|---|---|
0 | input_0 | output_0 | bidir_0 |
1 | input_1 | output_1 | bidir_1 |
2 | input_2 | output_2 | bidir_2 |
3 | input_3 | output_3 | bidir_3 |
4 | input_4 | output_4 | bidir_4 |
5 | input_5 | output_5 | bidir_5 |
6 | input_6 | output_6 | bidir_6 |
7 | input_7 | output_7 | bidir_7 |