482 Field Programmable Resistor Network

482 : Field Programmable Resistor Network

Design render
  • Author: htfab
  • Description: A few resistors and switches wired up in a matrix pattern.
  • GitHub repository
  • Clock: 0 Hz

How it works

A few resistors and switches are wired up in a matrix pattern. Switches are implemented as pass gates controlled by latches that keep the configuration. The network can be used as a makeshift DAC by controlling the "bitstream".

Circuit diagram

Matrix cells can be selected using the H_GATE_i and V_GATE_j inputs:

  • H_GATE_0 = uio_in[5]
  • H_GATE_1 = uio_in[2]
  • H_GATE_2 = ui_in[1]
  • V_GATE_0 = uio_in[6]
  • V_GATE_1 = uio_in[3]
  • V_GATE_2 = uio_in[0]

When the inputs H_GATE_i and V_GATE_j are on, the latches in the cell ij become transparent and configure the pass gates as follows:

  • HR_ijHD_RES = ui_in[4]
  • HS_ijHD_SHORT = ui_in[3]
  • HL_ijHD_LINE = ui_in[2]
  • VR_ijVD_RES = ui_in[7]
  • VS_ijVD_SHORT = ui_in[6]
  • VL_ijVD_LINE = ui_in[5]

Once H_GATE_i or V_GATE_j is off again, the latches close and the pass gates keep their configuration. Thus a new cell with different i or j can be configured using the same inputs.

How to test

After the network is configured as above, manipulate the digital inputs H_INPUT_i and V_INPUT_j to apply 0 V or 1.8 V at the respective nodes of the network:

  • HI_0H_INPUT_0 = ui_in[0]
  • HI_1H_INPUT_1 = rst_n
  • HI_2H_INPUT_2 = clk
  • VI_0V_INPUT_0 = uio_in[7]
  • VI_1V_INPUT_1 = uio_in[4]
  • VI_2V_INPUT_2 = uio_in[1]

The voltage can be measured externally at the analog pin AP = ua[0].

External hardware

Multimeter (or microcontroller with ADC) to measure the output voltage.

IO

#InputOutputBidirectional
0`H_INPUT_0``V_GATE_2`
1`H_GATE_2``V_INPUT_2`
2`HD_LINE``H_GATE_1`
3`HD_SHORT``V_GATE_1`
4`HD_RES``V_INPUT_1`
5`VD_LINE``H_GATE_0`
6`VD_SHORT``V_GATE_0`
7`VD_RES``V_INPUT_0`

Analog pins

uaanalogDescription
00`ANALOG_PIN`

Chip location

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