
The project is a signed binary 4-bit adder-subtractor module. The module is constructed using muxes, half adders and full adders.
Depending on the sign[1:0] bits, the circuit can perform the following operations:
| sign[1:0] | Operation |
|---|---|
| 00 | A + B |
| 01 | -A + B |
| 10 | A - B |
| 11 | -A - B |
The signed_addsub_tb testbench includes extensive test cases for the 4-bit Signed adder-subtractor circuit. The desing has been tested using QuestaSim.
None
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | a0 | s0 | sign0 |
| 1 | a1 | s1 | sign1 |
| 2 | a2 | s2 | |
| 3 | a3 | s3 | |
| 4 | b0 | ||
| 5 | b1 | ||
| 6 | b2 | ||
| 7 | b3 |