390 GPS_Accelerator
390 : GPS_Accelerator
- Author: jpigdon
- Description: GNSS Accelerator to demonstrate acquisition and tracking on Tiny Tapeout
- GitHub repository
- Open in 3D viewer
- Clock: 2200000 Hz
How it works
Implements a basic GNSS receiver including functionality to synchronise in time and frequency with different GNSS constellations.
Works in conjunction with a GPS front end capable of providing single bit (and potentially multi bit I/Q streams along with an ADC sampling clock.
Design is targeting MAX2769 and MAX2771 from Analog Devices, though testing may not occur with hw due to time limitations.
A table of features and maturity is below:
| Requirement ID | State | Description |
|---|---|---|
| 1.0 | ☑️ | Support search for acquisition |
| 1.1 | ☑️ | Generate Gold Codes for GPS L1 |
| 1.2 | ☑️ | Generate NCO for frequency correction |
| 1.3 | ☑️ | Generate timing signal for frame |
| 2.0 | ☑️ | Provide SPI slave interface for command and control |
| 2.1 | ☑️ | support clock domain crossing between SPI clock and sample clock |
| 2.2 | ☑️ | Provide readback for acquisition registers |
| 2.3 | ☑️ | provide readback for tracking registers |
| 3.0 | ☑️ | Enable tracking channel for time, freq, sv settings |
| 3.1 | ☑️ | provide update mechanism for tracking channels |
| 3.2 | ☑️ | provide early/mid/late tracking for tracking channels to improve acquition performance |
| 3.3 | ❌ | support selectable correlation duration |
How to test
Will need a custom load on the RP2050 on the TT development kit to manage software interactions.
Needs a source of GNSS data, either recorded or simulated, look in /data for example data
External hardware
Custom MAX2769 or MAX2771 board required, SPI interface to RP2050 for configuration and control.
IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | MAX2771 I0 - Quantised ADC I0 input stream | Interrupt to Software (Frame Timing or acq. exceedance) | SPI Registers - CS |
| 1 | MAX2771 I1 - Quantised ADC I1 input stream | Unused | SPI Registers - MOSI |
| 2 | MAX2771 Q0 - Quantised ADC Q0 input stream | Unused | SPI Registers - MISO |
| 3 | MAX2771 Q1 - Quantised ADC Q1 input stream | Unused | SPI Registers - SCK |
| 4 | MAX2771 CLKOUT Pin - configured for ADC sample clock | Unused | Nice to have MAX2771 Passthrough - CS |
| 5 | MAX2771 Lock Detect | Unused | Nice to have MAX2771 Passthrough - SDATA |
| 6 | Unused | Unused | Nice to have MAX2771 Passthrough - SCLK |
| 7 | Unused | Unused | Nice to have MAX2771 SHUTDOWN |