
This project is a small digital companion tile for a future local memristive AI chip. It does not implement real memristors. Instead, it implements the digital control contract around a symbolic memristive update:
LOAD_TARGET.LOAD_CURRENT.START.pulse_up or pulse_down events while moving the symbolic current toward the target.verify_ok when the target is reached, or fault when the attempt budget is exhausted.The public output contract exposes status, pulse events, verification status, a fault bit, an attempt counter and an FSM state code. It does not expose the loaded target/current values directly on the public outputs in the tested scenarios.
Reset the design, then drive the command/data input bus:
01vvvvvv: load target.10vvvvvv: load current.11mmmm01: start with max attempt count m.11xxxx10: clear public state.Expected smoke tests:
pulse_up events and finishes with verify_ok.pulse_down events and finishes with verify_ok.fault after timeout.The cocotb tests in test/test.py cover these scenarios and the CLEAR command.
The Yosys-only contract checks in formal/companion_contract.sv prove the same terminal expectations for the packaged RTL and can be run with:
yosys formal/run_yosys_contract.ys
No external hardware is required for the logic test. On a Tiny Tapeout demo board, switches or a microcontroller can drive the 8 input bits, and LEDs or a logic analyzer can observe the public outputs.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | data0 | privacy_ok | state0 |
| 1 | data1 | verify_ok | state1 |
| 2 | data2 | pulse_down | state2 |
| 3 | data3 | pulse_up | state3 |
| 4 | data4 | fault | attempt0 |
| 5 | data5 | done | attempt1 |
| 6 | cmd0 | busy | attempt2 |
| 7 | cmd1 | ready | attempt3 |