485 MarcoPolo

485 : MarcoPolo

Design render
  • Author: Javier Munoz Saez
  • Description: when this UART receives 'MARCO' answers ' POLO! ' , adapted from https://github.com/javiBajoCero/ttihp-verilog-template
  • GitHub repository
  • Open in 3D viewer
  • Clock: 50000000 Hz

How it works

This is just an UART + small WS2812b single led driver copied from my old ttsky submission https://github.com/javiBajoCero/ttsky-verilog-template

Listens to ascii 'MARCO' and once detected, with 10us delay (mega fast) replies with '\n\rPOLO!\n\r' and blips the LED from red to green.
Demonstration
FPGA tested :)

How to test

The device will need 50Mhz clock. (provided by the RP2 )

Connect ui[0]: "uartRX" and uo[0]: "uartTX" with your favourite UART gizmo, i used my PC and FTDI FT2232HQ USB-UART bridge builtin my ArtyS7 evaluation board.

with default putty serial settings 9600 bauds 8 data bits 1 stop bit parity NONE

and type uppercase 'MARCO' trough UART RX pin you should receive a '\n\rPOLO!\n\r' on UART TX pin

Some extra debugging signals are also exposed :

  • uo[1]: "baud_tick_rx" //clock for 9600*8 bauds
  • uo[2]: "baud_tick_tx" //clock for 9600 bauds
  • uo[3]: "trigger_send" //flank signaling the start of uart txing
  • uo[4]: "uartTxbusy" //stays high as long as uart is Txing
  • uo[5]: "led_data_out" //connect the single WS2812b led here.

External hardware

probably a USB to TTL dongle like CP2102, and a WS2812b led

IO

#InputOutputBidirectional
0uartRXuartTXunused
1baud_tick_rx
2baud_tick_tx
3trigger_send
4uartTxbusy
5led_data_out
61
71

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