198 Minilogix

198 : Minilogix

Design render
  • Author: Harald Pretl
  • Description: A configurable 8b in, 8b out logic block with optional feedback
  • GitHub repository
  • Clock: 20000000 Hz

How it works

A programmable 8b input, 8b output freely programmable logic block with optional internal feedback. This can serve many purposes, once an FPGA-style configuration SW is available.

How to test

  • Load the logic block in serial mode.
  • Test the logic functionality by applying different digital inputs.

External hardware

Just a way to set digital inputs is needed, plus a way to check the digital outputs.

IO

#InputOutputBidirectional
0data in0data out0load enable
1data in1data out1load clk
2data in2data out2load data
3data in3data out3
4data in4data out4
5data in5data out5dbg out0
6data in6data out6dbg out1
7data in7data out7dbg out2

Chip location

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